MC56F8257VLH Freescale Semiconductor, MC56F8257VLH Datasheet - Page 11

DSC 64K FLASH 60MHZ 64-LQFP

MC56F8257VLH

Manufacturer Part Number
MC56F8257VLH
Description
DSC 64K FLASH 60MHZ 64-LQFP
Manufacturer
Freescale Semiconductor
Series
56F8xxxr

Specifications of MC56F8257VLH

Core Processor
56800E
Core Size
16-Bit
Speed
60MHz
Connectivity
CAN, I²C, LIN, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
54
Program Memory Size
64KB (32K x 16)
Program Memory Type
FLASH
Ram Size
4K x 16
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 16x12b, D/A 1x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 105°C
Package / Case
64-LQFP
Product
DSCs
Processor Series
56800E
Core
56800E
Device Million Instructions Per Second
60 MIPs
Maximum Clock Frequency
60 MHz
Number Of Programmable I/os
54
Data Ram Size
8 KB
Operating Supply Voltage
3.3 V
Maximum Operating Temperature
+ 105 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
12 bit, 8 Channel
Package
64LQFP
Family Name
MC56F82xx
Maximum Speed
60 MHz
Data Bus Width
16 Bit
Interface Type
CAN/I2C/SCI/SPI
On-chip Dac
1-chx12-bit
Number Of Timers
8
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details

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2.4
The documents listed in
Documentation is available from local Freescale distributors, Freescale Semiconductor sales offices, Freescale Literature
Distribution Centers, or online at http://www.freescale.com.
3
3.1
The input and output signals of the MC56F825x/MC56F824x are organized into functional groups, as detailed in
Freescale Semiconductor
Power inputs (V
Ground (V
Reset
Enhanced Flex Pulse Width Modulator (eFlexPWM) ports
Queued Serial Peripheral Interface (SPI) ports
Queued Serial Communications Interface 0&1 (QSCI0 & QSCI1) ports
Inter-Integrated Circuit Interface 0&1 (I
Analog-to-Digital Converter (ADC) inputs
High Speed Analog Comparator inputs/outputs
12-bit Digital-to-Analog Converter (DAC_12B) output
Quad Timer Module (TMRA & TMRB) ports
Freescale’s Scalable Controller-Area-Network (MSCAN)
Inter-Module Cross Bar package inputs/outputs
Clock
JTAG/Enhanced On-Chip Emulation (EOnCE)
DSP56800E Reference Manual
MC56F825x Reference Manual
MC56F824x/5x Serial Bootloader
User Guide
MC56F825x Technical Data Sheet Electrical and timing specifications, pin descriptions, and package
MC56F825x Errata
1
1
SS
Product Documentation
Signal/Connection Descriptions
Introduction
, V
Topic
SSA
DD
, V
)
DDA,
Table 2
V
Functional Group
CAP
Table 2. MC56F825x/MC56F824x Device Documentation
)
are required for a complete description and proper design with the MC56F825x/MC56F824x.
MC56F825x/MC56F824x Digital Signal Controller, Rev. 3
Detailed description of the 56800E family architecture, 16-bit digital
signal controller core processor, and the instruction set
Detailed description of peripherals of the MC56F825x/MC56F824x
devices
Detailed description of the Serial Bootloader in the 56F800x family of
devices
descriptions (this document)
Detailed description of any chip issues that might be present
Table 3. Functional Group Pin Allocations
2
C0 & I
1
1
2
1
1
1
C0) ports
1
1, 2
1
1
Description
1
Number of Pins
in 44 LQFP
11
10
5
4
1
6
4
6
4
8
1
5
2
3
4
Number of Pins
Signal/Connection Descriptions
in 48 LQFP
10
12
12
1
5
4
1
6
4
6
4
5
2
4
4
DSP56800ERM
MC56F825XRM
TBD
MC56F825X
MC56F825XE
Order Number
Number of Pins
in 64 LQFP
Table
16
15
17
6
4
1
9
4
9
6
1
8
2
4
4
3.
11

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