PIC18F26K80-I/SO Microchip Technology, PIC18F26K80-I/SO Datasheet - Page 200

• Manufacturer Part Number: PIC18F26K80-I/SO
• Description: MCU PIC 64KB FLASH 28SOIC
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 18Fr

Specifications of PIC18F26K80-I/SO

• Core Size: 8-Bit
• Program Memory Size: 64KB (32K x 16)
• Peripherals: Brown-out Detect/Reset, LVD, POR, PWM, WDT
• Core Processor: PIC
• Speed: 64MHz
• Connectivity: ECAN, I²C, LIN, SPI, UART/USART
• Number Of I /o: 24
• Program Memory Type: FLASH
• Eeprom Size: 1K x 8
• Ram Size: 3.6K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 8x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 28-SOIC (0.300", 7.50mm Width)
• Controller Family/series: PIC18
• Ram Memory Size: 4KB
• Cpu Speed: 16MIPS
• No. Of Pwm Channels: 5
• Embedded Interface Type: I2C, SPI, USART
• Processor Series: PIC18F26K80
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 1 KB
• Interface Type: I2C, SPI, USART
• Maximum Clock Frequency: 64 MHz
• Number Of Programmable I/os: 24
• Number Of Timers: 5
• Operating Supply Voltage: 1.8 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

PIC18F66K80 FAMILY
FIGURE 11-5:
TABLE 11-15: REGISTERS ASSOCIATED WITH PARALLEL SLAVE PORT
DS39977C-page 200
PORTD
LATD
TRISD
PORTE
LATE
TRISE
PSPCON
INTCON
PIR1
PIE1
IPR1
PMD1
Legend: — = unimplemented, read as ‘ 0 ’. Shaded cells are not used by the Parallel Slave Port.
Name
PORTD<7:0>
PSPIF
OBF
WR
GIE/GIEH
IBF
RD
CS
TRISD7
TRISE7
PSPMD
LATD7
LATE7
PSPIE
PSPIP
PSPIF
Bit 7
RD7
RE7
IBF
PARALLEL SLAVE PORT READ WAVEFORMS
Q1
PEIE/GIEL
CTMUMD
TRISD6
TRISE6
LATD6
LATE6
ADIE
ADIP
Bit 6
ADIF
OBF
RD6
RE6
Q2
Q3
TRISD5
TMR0IE
ADCMD
TRISE5
LATD5
LATE5
RC1IF
RC1IE
RC1IP
IBOV
Bit 5
RD5
RE5
Q4
Preliminary
PSPMODE
TMR4MD
TRISD4
TRISE4
LATD4
INT0IE
LATE4
TX1IE
TX1IP
TX1IF
Q1
Bit 4
RD4
RE4
Q2
TMR3MD
TRISD3
LATD3
SSPIE
SSPIP
SSPIF
RBIE
Bit 3
RD3
RE3
—
—
—
Q3
Q4
TMR1GIF
TMR1GIE
TMR1GIP
TMR2MD
TRISD2
TMR0IF
TRISE2
LATD2
LATE2
Bit 2
RD2
RE2
—
Q1
 2011 Microchip Technology Inc.
TMR1MD
TRISD1
TMR2IF
TMR2IE
TMR2IP
TRISE1
Q2
LATD1
INT0IF
LATE1
Bit 1
RD1
RE1
—
Q3
TMR0MD
TMR1IF
TMR1IE
TMR1IP
TRISD0
TRISE0
LATD0
LATE0
RBIF
Bit 0
RD0
RE0
Q4
—