MSC7118VF1200 Freescale Semiconductor, MSC7118VF1200 Datasheet - Page 26

• Manufacturer Part Number: MSC7118VF1200
• Description: DSP 16BIT W/DDR CTRLR 400-MAPBGA
• Manufacturer: Freescale Semiconductor
• Series: MSC711x StarCorer
• Type: Fixed Pointr

Specifications of MSC7118VF1200

• Interface: Host Interface, I²C, UART
• Clock Rate: 300MHz
• Non-volatile Memory: ROM (8 kB)
• On-chip Ram: 464kB
• Voltage - I/o: 3.30V
• Voltage - Core: 1.20V
• Operating Temperature: -40°C ~ 105°C
• Mounting Type: *
• Package / Case: 400-MAPBGA
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

Electrical Characteristics
2.5.4
This section provides the AC electrical characteristics for the DDR DRAM interface.
2.5.4.1
Table 17 provides the input AC timing specifications for the DDR DRAM interface.
2.5.4.2
Table 18 and Table 19 list the output AC timing specifications and measurement conditions for the DDR DRAM
interface.
26
Notes:
No.
201
202
No.
200
204
205
206
207
208
Note: DQS centering is done internally.
—
—
AC input low voltage
AC input high voltage
Maximum Dn input setup skew relative to DQSn input
Maximum Dn input hold skew relative to DQSn input
1.
2.
3.
CK cycle time, (CK/CK crossing)
• 100 MHz (DDR200)
• 150 MHz (DDR300)
An/RAS/CAS/WE/CKE output setup with respect to CK
An/RAS/CAS/WE/CKE output hold with respect to CK
CSn output setup with respect to CK
CSn output hold with respect to CK
CK to DQSn
Maximum possible skew between a data strobe (DQSn) and any corresponding bit of data (D[8n + {0...7}] if 0 ≤ n ≤ 7).
See Table 18 for t
Dn should be driven at the same time as DQSn. This is necessary because the DQSn centering on the DQn data tenure is
done internally.
DDR DRAM Controller Timing
DQSn
DDR DRAM Input AC Timing Specifications
DDR DRAM Output AC Timing Specifications
Dn
2
MSC7118 Low-Cost 16-bit DSP with DDR Controller Data Sheet, Rev. 7
CK
Parameter
Parameter
value.
Figure 5. DDR DRAM Input Timing Diagram
1
Table 18. DDR DRAM Output AC Timing
Table 17. DDR DRAM Input AC Timing
202
201
D0
Symbol
D1
t
t
t
t
t
DDKHMH
202
DDKHAS
DDKHAX
DDKHCS
DDKHCX
t
CK
Symbol
201
V
V
—
—
IH
IL
0.5 × t
0.5 × t
0.5 × t
0.5 × t
V
–600
Min
6.67
REF
CK
CK
CK
CK
10
Min
– 1000
– 1000
– 1000
– 1000
—
—
—
+ 0.31
Freescale Semiconductor
V
V
REF
DDM
Max
Max
900
900
600
—
—
—
—
—
—
– 0.31
+ 0.3
Unit
Unit
ps
ps
ns
ns
ps
ps
ps
ps
ps
V
V