ISL12022MIBZ-T7A Intersil, ISL12022MIBZ-T7A Datasheet
ISL12022MIBZ-T7A
Specifications of ISL12022MIBZ-T7A
Related parts for ISL12022MIBZ-T7A
ISL12022MIBZ-T7A Summary of contents
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... IRQ/FOUT -40 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 1-888-468-3774 | Intersil (and design registered trademark of Intersil Americas Inc Bus is a registered trademark owned by NXP Semiconductors Netherlands, B.V. Copyright Intersil Americas Inc. 2008, 2009, 2010. All Rights Reserved. ...
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Block Diagram SDA SDA BUFFER SCL SCL BUFFER CRYSTAL OSCILLATOR TRIP + - V BAT GND Pin Configuration Pin Descriptions PIN NUMBER SYMBOL Connection. Do not connect to a signal ...
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... PART NUMBER (Note 3) MARKING ISL12022MIBZ (Note 2) ISL12022MIBZ ISL12022MIBZ-T (Notes 1, 2) ISL12022MIBZ 1. Please refer to TB347 for details on reel specifications. 2. These Intersil plastic packaged products employ special material sets, molding compounds and 100% matte tin plate plus anneal (e3) termination finish. These products do contain Pb but they are RoHS compliant by exemption 7 (lead in high melt temp solder for internal connections) and exemption 5 (lead in piezoelectric elements) ...
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Table of Contents Typical Application Circuit ................................. 1 Performance Curve ............................................ 1 Block Diagram ................................................... 2 Pin Descriptions ................................................ 2 Absolute Maximum Ratings .............................. 5 Thermal Information ........................................ 5 Electrical Specifications .................................... Interface Specifications .............................. 6 ...
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... Thermal Resistance (Typical) 20 Lead SOIC (Notes 4, 5) Storage Temperature . . . . . . . . . . . . . . . -40°C to +85°C + 0.3V DD Pb-Free Reflow Profile (Note .see link below http://www.intersil.com/pbfree/Pb-FreeReflow.asp Test Conditions +2.7 to +5.5V stated. Boldface limits apply over the operating temperature range, -40°C to +85°C. CONDITIONS (Note 15) ...
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DC Operating Characteristics RTC SYMBOL PARAMETER IRQ/F (OPEN DRAIN OUTPUT) OUT V Output Low Voltage OL Power-Down Timing Test Conditions: V stated. SYMBOL PARAMETER V V Negative Slew Rate DDSR Interface Specifications SYMBOL PARAMETER V SDA ...
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I C Interface Specifications SYMBOL PARAMETER t START Condition Hold Time HD:STA t Input Data Setup Time SU:DAT t Input Data Hold Time HD:DAT t STOP Condition Setup Time SU:STO t STOP Condition Hold Time HD:STO t Output Data ...
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SDA vs SCL Timing t F SCL t SU:STA t HD:STA SDA (INPUT TIMING) SDA (OUTPUT TIMING) EQUIVALENT AC OUTPUT LOAD CIRCUIT FOR V 5.0V 1533Ω SDA AND IRQ/F OUT 100pF FIGURE 1. STANDARD OUTPUT LOAD FOR TESTING THE DEVICE ...
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Typical Performance Curves 1050 1000 950 900 850 800 1.8 2.3 2.8 3.3 3.8 V VOLTAGE (V) BAT FIGURE BAT BAT 5. 3. -40 -20 ...
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Typical Performance Curves 5.5 5 32kHz OUT 4.5 4.0 3.5 F OUT 3.0 2.5 -40 - TEMPERATURE (°C) FIGURE TEMPERATURE, 3 DIFFERENT F DD 110 100 V = 5.5V BAT ...
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... Functional Description Power Control Operation The power control circuit accepts a V input. Many types of batteries can be used with Intersil RTC products. For example, 3.0V or 3.6V Lithium batteries are appropriate, and battery sizes are available that can power the ISL12022M for years. ...
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These registers will hold the original power-down value until they are cleared by setting CLRTS = 1 to clear the registers. The normal power switching of the ISL12022M is designed to switch into battery backup ...
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Time Stamp for V Status (5 bytes): Address 1Bh DD to 1Fh. 6. Day Light Saving Time (8 bytes): 20h to 27h. 7. TEMP (2 bytes): 28h to 29h. 8. Crystal Net PPM Correction, NPPM (2 bytes): 2Ah, 2Bh ...
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TABLE 1. REGISTER MEMORY MAP (YELLOW SHADING INDICATES READ-ONLY BITS) (Continued) REG ADDR. SECTION NAME 7 16h VSC 0 17h VMN 0 TSV2B 18h VHR VMIL 19h VDT 0 1Ah VMO 0 1Bh BSC 0 1Ch BMN 0 TSB2V 1Dh ...
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Control and Status Registers (CSR) Addresses [07h to 0Fh] The Control and Status Registers consist of the Status Register, Interrupt and Alarm Register, Analog Trimming and Digital Trimming Registers. STATUS REGISTER (SR) The Status Register is located in the memory ...
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Example - When the LBAT75 is Set to “1” in Battery Mode: The minute register changes to 30h when the device is in battery mode, the LBAT75 is set to “1” the next time the device switches back to Normal ...
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Power Supply Control Register (PWR_VDD) CLEAR TIME STAMP BIT (CLRTS) ADDR 09h CLRTS This bit clears Time Stamp V to Battery (TSV2B) and DD Time Stamp Battery to V ...
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... If an application requires adjustment of the IATR bits outside the preset values, the user should contact Intersil. AGING AND INITIAL TRIM DIGITAL TRIMMING BITS (IDTR0<1:0>) These bits allow ±30.5ppm initial trimming range for the crystal frequency. This is meant coarse adjustment if the range needed is outside that of the IATR control ...
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ALPHA Register (ALPHA) TABLE 13. ALPHA REGISTER ADD 0Ch D ALPHA6 ALPHA5 ALPHA4 ALPHA3 ALPHA2 ALPHA1 ALPHA0 The ALPHA variable is 8 bits and is defined as the temperature coefficient of crystal from -40°C ...
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AT(max ppm ( 00H) and OUT AT(min ppm ( 3FH). OUT The BETA VALUES result is indexed in the right hand column and the resulting Beta factor (for the register) ...
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Any one alarm register, multiple registers, or all registers can be enabled for a match. There are two alarm operation modes: Single Event and periodic Interrupt Mode: • Single Event Mode is enabled by setting the bit 7 on ...
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DST Control Registers (DSTCR) 8 bytes of control registers have been assigned for the Daylight Savings Time (DST) functions. DST beginning (set Forward) time is controlled by the registers DstMoFd, DstDwFd, DstDtFd, and DstHrFd. DST ending time (set Backward or ...
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DST Day/Week Reverse DstDwRv contains both the Day of the Week and the Week of the Month data for DST Reverse control. DST can be controlled either by actual date or by setting both the Week of the month and ...
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TABLE 24. XT0 VALUES XT<4:0> 01111 01110 01101 01100 01011 01010 01001 01000 00111 00110 00101 00100 00011 00010 00001 00000 10000 10001 10010 10011 10100 10101 10110 10111 11000 11001 11010 11011 11100 11101 11110 11111 ALPHA Hot Register ...
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SCL SDA START FIGURE 15. VALID DATA CHANGES, START AND STOP CONDITIONS SCL FROM MASTER SDA OUTPUT FROM TRANSMITTER SDA OUTPUT FROM RECEIVER START FIGURE 16. ACKNOWLEDGE RESPONSE FROM RECEIVER SIGNALS FROM THE MASTER SIGNAL AT SDA SIGNALS FROM THE ...
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For a random read of the Control/Status Registers, the slave byte must be “1101111x” in both places ...
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S SIGNALS T IDENTIFICATION FROM THE A MASTER BYTE WITH R R SIGNAL SDA SIGNALS FROM THE SLAVE FIGURE 20. READ SEQUENCE (CSR SLAVE ADDRESS SHOWN) Figure 21 ...
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Daylight Savings Time (DST) Example DST involves setting the forward and back times and allowing the RTC device to automatically advance the time or set the time back. This can be done for current year, and future years. Many regions ...
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... Added “Related Literature*(see page 30)” on page 1 1/20/10 FN6668.6 Updated Note 2 in Ordering Information table from “These Intersil Pb-free plastic packaged products employ special Pb-free material sets, molding compounds/die attach materials, and 100% matte tin plate plus anneal (e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations) ...
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... Initial Release with FN6668 making this a Rev 0. Products Intersil Corporation is a leader in the design and manufacture of high-performance analog semiconductors. The Company's products address some of the industry's fastest growing markets, such as, flat panel displays, cell phones, handheld products, and notebooks. Intersil's product families address power management and analog signal processing functions ...
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... Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries ...