SI5020-B-GM Silicon Laboratories Inc, SI5020-B-GM Datasheet - Page 16

• Manufacturer Part Number: SI5020-B-GM
• Description: IC CLK DATA REC SONET/SDH 20-QFN
• Manufacturer: Silicon Laboratories Inc

Specifications of SI5020-B-GM

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Si5020
5. Pin Descriptions: Si5020
16
Pin #
10
12
13
1
4
5
6
9
Pin Name
REFCLK+
REFCLK–
DOUT+
DOUT–
REXT
DIN+
DIN–
LOL
Figure 10. Si5020 Pin Configuration
I/O
Table 9. Si5020 Pin Descriptions
O
O
I
I
REFCLK+
REFCLK–
REXT
GND
VDD
Signal Level
See Table 2
See Table 2
1
2
3
4
5
LVTTL
20 19 18 17 16
6
CML
Connection
Rev. 1.5
7
GND
Pad
8
9
10
External Bias Resistor.
This resistor is used by onboard circuitry to estab-
lish bias currents within the device. This pin must
be connected to GND through a 10 kΩ (1%) resis-
tor.
Differential Reference Clock.
The reference clock sets the initial operating fre-
quency used by the onboard PLL for clock and data
recovery. Additionally, the reference clock is used to
derive the clock output when no data is present.
Loss-of-Lock.
This output is driven high when the recovered clock
frequency deviates from the reference clock by the
amount specified in Table 4 on page 7.
Differential Data Input.
Clock and data are recovered from the differential
signal present on these pins.
Differential Data Output.
The data output signal is a retimed version of the
data recovered from the signal present on DIN. It is
phase aligned with CLKOUT and is updated on the
rising edge of CLKOUT.
15
14
13
12
11
PWRDN
VDD
DOUT+
DOUT–
VDD
Description