AGL400V5-FGG256 Actel, AGL400V5-FGG256 Datasheet - Page 120
![FPGA - Field Programmable Gate Array 400K System Gates](/photos/16/15/161508/fgba-256_sml.jpg)
AGL400V5-FGG256
Manufacturer Part Number
AGL400V5-FGG256
Description
FPGA - Field Programmable Gate Array 400K System Gates
Manufacturer
Actel
Datasheet
1.AGL030V2-CSG81.pdf
(236 pages)
Specifications of AGL400V5-FGG256
Processor Series
AGL400
Core
IP Core
Number Of Logic Blocks
12
Maximum Operating Frequency
250 MHz
Number Of Programmable I/os
178
Data Ram Size
54 Kbit
Supply Voltage (max)
1.5 V
Supply Current
27 uA
Maximum Operating Temperature
+ 70 C
Minimum Operating Temperature
0 C
Development Tools By Supplier
AGL-Icicle-Kit, AGL-Dev-Kit-SCS, Silicon-Explorer II, Silicon-Sculptor 3, SI-EX-TCA, FlashPro 4, FlashPro 3, FlashPro Lite
Mounting Style
SMD/SMT
Supply Voltage (min)
1.425 V
Number Of Gates
400 K
Package / Case
FPBGA-256
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
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Company:
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AGL400V5-FGG256
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Part Number:
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Manufacturer:
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Quantity:
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Company:
Part Number:
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Quantity:
20 000
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IGLOO DC and Switching Characteristics
Global Resource Characteristics
Figure 2-29 • Example of Global Tree Use in an AGL250 Device for Clock Routing
2- 10 6
CCC
AGL250 Clock Tree Topology
Clock delays are device-specific.
global tree presented in
is used to drive all D-flip-flops in the device.
Figure 2-29
Figure 2-29
is driven by a CCC located on the west side of the AGL250 device. It
R ev isio n 1 8
is an example of a global tree used for clock routing. The
Central
Global Rib
VersaTile
Rows
Global Spine
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