LFE2-6E-5FN256C Lattice, LFE2-6E-5FN256C Datasheet - Page 117
![FPGA - Field Programmable Gate Array 6K LUTs 190 I/O DSP 1.2V -5](/photos/16/14/161499/landingpagelatticeecp2m_sml.jpg)
LFE2-6E-5FN256C
Manufacturer Part Number
LFE2-6E-5FN256C
Description
FPGA - Field Programmable Gate Array 6K LUTs 190 I/O DSP 1.2V -5
Manufacturer
Lattice
Datasheet
1.LFE2-12SE-6FN256C.pdf
(389 pages)
Specifications of LFE2-6E-5FN256C
Number Of Macrocells
6000
Number Of Programmable I/os
190
Data Ram Size
56320
Supply Voltage (max)
1.26 V
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
0 C
Mounting Style
SMD/SMT
Supply Voltage (min)
1.14 V
Package / Case
FPBGA-256
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
LFE2-6E-5FN256C
Manufacturer:
Lattice
Quantity:
52
Company:
Part Number:
LFE2-6E-5FN256C
Manufacturer:
LATTICE
Quantity:
20
Company:
Part Number:
LFE2-6E-5FN256C
Manufacturer:
Lattice Semiconductor Corporation
Quantity:
10 000
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LatticeECP2M Pin Information Summary, LFE2M50, LFE2M70 and LFE2M100
(Cont.)
Lattice Semiconductor
Available DDR-Interfaces
per I/O Bank
PCI Capable I/Os per Bank
1. Minimum requirement to implement a fully functional 8-bit wide DDR bus. Available DDR interface consists of at least 12 I/Os (1 DQS + 1
DQSB + 8 DQs + 1 DM + Bank VREF1).
1
Pin Type
Bank0
Bank1
Bank2
Bank3
Bank4
Bank5
Bank6
Bank7
Bank8
Bank0
Bank1
Bank2
Bank3
Bank4
Bank5
Bank6
Bank7
Bank8
484 fpBGA 672 fpBGA 900 fpBGA 900 fpBGA 1152 fpBGA 900 fpBGA 1152 fpBGA
50
60
52
60
0
0
2
2
3
2
1
3
0
0
0
0
0
0
LFE2M50
4-14
24
60
54
60
0
0
2
1
1
3
2
3
0
0
0
0
0
0
48
50
60
68
0
0
2
1
3
3
2
3
0
0
0
0
0
0
LatticeECP2/M Family Data Sheet
48
40
62
70
0
0
4
3
3
2
3
4
0
0
0
0
0
0
LFE2M70
72
64
40
40
66
74
0
0
4
4
3
3
4
4
0
0
0
0
Pinout Information
48
40
62
70
0
0
4
3
3
2
3
4
0
0
0
0
0
0
LFE2M100
80
80
44
46
82
90
0
0
4
5
3
3
5
5
0
0
0
0
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