LFE2-12SE-6FN256C Lattice, LFE2-12SE-6FN256C Datasheet - Page 47
LFE2-12SE-6FN256C
Manufacturer Part Number
LFE2-12SE-6FN256C
Description
FPGA - Field Programmable Gate Array 12K LUTs S-Series 1.1.2V -6 Spd
Manufacturer
Lattice
Datasheet
1.LFE2-12SE-6FN256C.pdf
(389 pages)
Specifications of LFE2-12SE-6FN256C
Number Of Macrocells
12000
Maximum Operating Frequency
320 MHz
Number Of Programmable I/os
193
Data Ram Size
226304
Delay Time
12 ns
Supply Voltage (max)
1.26 V
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
0 C
Mounting Style
SMD/SMT
Supply Voltage (min)
1.14 V
Package / Case
FPBGA-256
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
LFE2-12SE-6FN256C
Manufacturer:
Lattice Semiconductor Corporation
Quantity:
10 000
Company:
Part Number:
LFE2-12SE-6FN256C-5I
Manufacturer:
TI
Quantity:
160
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Lattice Semiconductor
O standards (together with their supply and reference voltages) supported by LatticeECP2/M devices. For further
information about utilizing the sysI/O buffer to support a variety of standards please see the the list of additional
technical information at the end of this data sheet.
Table 2-13. Supported Input Standards
Single Ended Interfaces
LVTTL
LVCMOS33
LVCMOS25
LVCMOS18
LVCMOS15
LVCMOS12
PCI 33
HSTL18 Class I, II
HSTL15 Class I
SSTL3 Class I, II
SSTL2 Class I, II
SSTL18 Class I, II
Differential Interfaces
Differential SSTL18 Class I, II
Differential SSTL2 Class I, II
Differential SSTL3 Class I, II
Differential HSTL15 Class I
Differential HSTL18 Class I, II
LVDS, MLVDS, LVPECL, BLVDS, RSDS
1 When not specified, V
Input Standard
CCIO
can be set anywhere in the valid operating range (page 3-1).
V
2-44
REF
0.75
1.25
0.9
1.5
0.9
—
—
—
—
—
—
—
—
—
—
—
—
—
(Nom.)
LatticeECP2/M Family Data Sheet
V
CCIO
1.8
1.5
3.3
1
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
(Nom.)
Architecture
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