AGLP030V5-CSG289 Actel, AGLP030V5-CSG289 Datasheet - Page 43

• Manufacturer Part Number: AGLP030V5-CSG289
• Description: FPGA - Field Programmable Gate Array 30K System Gates
• Manufacturer: Actel

Specifications of AGLP030V5-CSG289

• Processor Series: AGLP030
• Core: IP Core
• Number Of Macrocells: 256
• Maximum Operating Frequency: 250 MHz
• Number Of Programmable I/os: 4
• Data Ram Size: 4608 bit
• Supply Voltage (max): 1.575 V
• Maximum Operating Temperature: + 70 C
• Minimum Operating Temperature: 0 C
• Development Tools By Supplier: AGLP-Eval-Kit, AGL-Dev-Kit-SCS, Silicon-Explorer II, Silicon-Sculptor 3, SI-EX-TCA, Flashpro 4, Flashpro 3, Flashpro Lite
• Mounting Style: SMD/SMT
• Supply Voltage (min): 1.425 V
• Number Of Gates: 30 K
• Package / Case: CSP-289
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Table 2-40 • Minimum and Maximum DC Input and Output Levels
Table 2-41 • AC Waveforms, Measuring Points, and Capacitive Loads
3.3 V LVCMOS
Wide Range
Drive
Strength
100 µA
100 µA
100 µA
100 µA
100 µA
100 µA
Notes:
1. The minimum drive strength for any LVCMOS 3.3 V software configuration when run in wide range is ±100 µA. Drive
2. I
3. I
4. Currents are measured at high temperature (100°C junction temperature) and maximum voltage.
5. Currents are measured at 85°C junction temperature.
6. Software default selection highlighted in gray.
Input Low (V)
0
*
Measuring point = Vtrip. See
strength displayed in the software is supported for normal range only. For a detailed I/V curve, refer to the IBIS models.
larger when operating outside recommended ranges.
IL
IH
is the input leakage current per I/O pin over recommended operation conditions where –0.3 V < VIN < VIL.
is the input leakage current per I/O pin over recommended operating conditions VIH < VIN < V CCI. Input current is
3.3 V LVCMOS Wide Range
2 mA
4 mA
6 mA
8 mA
12 mA
16 mA
Equivalent
Software
Strength
Option
Default
Drive
1
Min.
–0.3
–0.3
–0.3
–0.3
–0.3
–0.3
V
Table 2-23 on page 2-21
VIL
Input High (V)
Max.
0.8
0.8
0.8
0.8
0.8
0.8
V
3.3
Min.
V
2
2
2
2
2
2
VIH
Max.
3.6
3.6
3.6
3.6
3.6
3.6
V
for a complete table of trip points.
R ev i si o n 1 1
Max.
VOL
0.2
0.4
0.4
0.4
0.4
0.4
V
Measuring Point* (V)
VDD – 0.2 100 100
VDD – 0.2 100 100
VDD – 0.2 100 100
VDD – 0.2 100 100
VDD – 0.2 100 100
VDD – 0.2 100 100
VOH
Min.
V
1.4
I
µA
OL
IGLOO PLUS Low Power Flash FPGAs
I
µA
OH
Max.
I
µA
103
103
OSL
25
25
51
51
4
C
LOAD
Max.
I
µA
109
109
OSH
27
27
54
54
5
4
(pF)
µA
I
10
10
10
10
10
10
IL
2
5
µA
I
10
10
10
10
10
10
IH
2- 29
3
5