LC4256V-75TN144C Lattice, LC4256V-75TN144C Datasheet - Page 60

• Manufacturer Part Number: LC4256V-75TN144C
• Description: CPLD - Complex Programmable Logic Devices 400MHZ 256 Macrocell 3.3 V 7.5 tPD
• Manufacturer: Lattice

Specifications of LC4256V-75TN144C

• Memory Type: EEPROM
• Number Of Macrocells: 256
• Number Of Product Terms Per Macro: 80
• Maximum Operating Frequency: 322 MHz
• Delay Time: 3 ns
• Number Of Programmable I/os: 48
• Operating Supply Voltage: 3.3 V
• Supply Current: 12.5 mA
• Maximum Operating Temperature: + 90 C
• Minimum Operating Temperature: 0 C
• Package / Case: TQFP-144
• Mounting Style: SMD/SMT
• Supply Voltage (max): 3.6 V
• Supply Voltage (min): 3 V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Lattice Semiconductor
ispMACH 4128V and 4256V Logic Signal Connections: 144-Pin TQFP (Cont.)
Pin Number
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
86
87
88
89
90
91
92
93
94
95
96
97
98
99
Bank Number
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
0
-
-
-
VCCO (Bank 1)
VCCO (Bank 1)
VCCO (Bank 1)
GND (Bank 1)
GND (Bank 1)
GND (Bank 1)
GND (Bank 0)
GLB/MC/Pad
H0/GOE1
CLK3/I
CLK0/I
TDO
VCC
GND
G14
G13
G12
G10
F12
F13
F14
NC
NC
NC
H14
H13
H12
H10
NC
G9
G8
G6
G5
G4
G2
G1
G0
H9
H8
H6
H5
H4
H2
H1
2
2
2
2
ispMACH 4128V
1
60
ispMACH 4000V/B/C/Z Family Data Sheet
G^11
G^10
H^11
H^10
ORP
F^10
F^11
G^9
G^8
G^7
G^6
G^5
G^4
G^3
G^2
G^1
G^0
H^9
H^8
H^7
H^6
H^5
H^4
H^3
H^2
H^1
H^0
F^9
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
VCCO (Bank 1)
VCCO (Bank 1)
VCCO (Bank 1)
GND (Bank 1)
GND (Bank 1)
GND (Bank 0)
GLB/MC/Pad
P2/GOE1
CLK3/I
CLK0/I
GND
TDO
VCC
M10
M12
N10
N12
O12
O10
NC
P12
P10
M2
M4
M6
M8
O8
O6
O4
O2
N2
N4
N6
N8
P8
P6
P4
L8
L6
L4
I
I
I
I
2
2
2
2
1
ispMACH 4256V
ORP
M^1
M^2
M^3
M^4
M^5
M^6
O^2
O^1
N^1
N^2
N^3
N^4
N^5
N^6
O^6
O^5
O^4
O^3
P^6
P^5
P^4
P^3
P^2
P^1
L^4
L^3
L^2
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-