CAT825LSDI-GT3 ON Semiconductor, CAT825LSDI-GT3 Datasheet - Page 7

• Manufacturer Part Number: CAT825LSDI-GT3
• Description: Supervisory Circuits SUP ACT LOW ACT HI MR
• Manufacturer: ON Semiconductor

Specifications of CAT825LSDI-GT3

• Chip Enable Signals: No
• Minimum Operating Temperature: - 40 C
• Number Of Voltages Monitored: 1
• Overvoltage Threshold: 4.63 V
• Manual Reset: Resettable
• Watchdog: No
• Battery Backup Switching: No
• Power-up Reset Delay (typ): 20 us
• Supply Voltage (max): 5.5 V
• Supply Voltage (min): 1.2 V
• Supply Current (typ): 3 uA
• Maximum Power Dissipation: 247 mW
• Mounting Style: SMD/SMT
• Maximum Operating Temperature: + 85 C
• Package / Case: SC-70-5

FUNCTIONAL DESCRIPTION
PROCESSOR RESET
The
conditions that are below the specified voltage trip
value (V
correct system operation. On power-up, RESET
RESET if available) are kept active for a minimum
delay t
above V
to stabilize. When V
value (V
RESET) are pulled active.
available) is specifically designed to provide the reset
input signals for processors. This provides reliable
and consistent operation as power is turned on, off or
during brownout conditions by maintaining the
processor operation in known conditions.
Figure 1. Pushbutton RESET
Figure 2. Timing Diagram – Pushbutton RESET
© 2010 SCILLC. All rights reserved.
Characteristics subject to change without notice
CAT823-825
RP
RST
RST
RST
of 140ms after the supply voltage (V
) and provide a reset output to maintain
), the reset output signals RESET
to allow the power supply and processor
RESET
RESET
MR
CC
detect
drops below the voltage trip
¯¯¯¯¯¯ (and RESET if
RESET
supply
V
IL
Voltage
Supply
t
PDLY
voltage
¯¯¯¯¯¯ (and
¯¯¯¯¯¯ (and
V
MR
CC
t
PB
CC
) rises
(V
CAT825
CC
)
7
MANUAL RESET
The CAT823 and CAT825 each have a Manual Reset
(MR
outputs. The MR
nection to a pushbutton (see Figure 1). The MR
is internally pulled up by 52kΩ resistor and must be
pulled low to cause the reset outputs to go active.
Internally, this input is debounced and timed such that
¯¯¯¯¯¯ (and RESET) signals of at least 140ms
RESET
minimum will be generated. The min 140ms t
commences as the Manual Reset input is released
from the low level. (see Figure 2)
¯¯¯ ) input to allow for alternative control of the reset
V
RESET
GND
RESET
IH
t
RP
V
V
¯¯¯ input is designed for direct con-
OH
OL
CAT823, CAT824, CAT825
Doc. No. MD-3027, Rev. D
¯¯¯ input
RP
delay