MPC8536BVTATH Freescale Semiconductor, MPC8536BVTATH Datasheet - Page 55
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MPC8536BVTATH
Manufacturer Part Number
MPC8536BVTATH
Description
Microprocessors (MPU) 8536 INDUSTRIAL 1250
Manufacturer
Freescale Semiconductor
Datasheet
1.MPC8536EBVTAQG.pdf
(126 pages)
Specifications of MPC8536BVTATH
Processor Series
MPC85xx
Core
e500
Data Bus Width
32 bit
Maximum Clock Frequency
1250 MHz
Operating Supply Voltage
3.3 V
Maximum Operating Temperature
+ 105 C
Mounting Style
SMD/SMT
Interface Type
I2C, SPI, UART
Minimum Operating Temperature
0 C
Package / Case
FCPBGA-783
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MPC8536BVTATHA
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Supply Voltage
Output high voltage
Output low voltage
Output ringing
Output differential voltage
Output offset voltage
Output impedance (single-ended)
Mismatch in a pair
Change in V
Change in V
Output current on short to GND
Notes:
1. This will not align to DC-coupled SGMII. X2V
2. |V
3. The |V
4. V
2.9.3.3
Table 39
Transmitter DC characteristics are measured at the transmitter outputs (SD2_TX[n] and SD2_TX[n]) as depicted in
Freescale Semiconductor
• The MSbit (bit 0) of the above bit field is set to zero (selecting the full V
• The LSbits (bit [1:3]) of the above bit field is set based on the equalization setting shown in table.
• 5.The |V
A & B) or XMITEQEF (for SerDes 2 lanes E & E) bit field of MPC8535E’s SerDes 2 Control Register:
(VOS =550mV), SerDes2 transmitter is terminated with 100-Ω differential load between SD2_TX[n] and SD2_TX[n].
OS
OD
is also referred to as output common mode voltage.
| = |V
OD
and
OD
| value shown in the table assumes the following transmit equalization setting in the XMITEQAB (for SerDes 2 lanes
Parameter
OD
OS
SD2_TXn
| value shown in the Typ column is based on the condition of X2V
Table 40
between “0” and “1”
between “0” and “1”
SGMII Transmitter and Receiver DC Electrical Characteristics
MPC8535E PowerQUICC III Integrated Processor Hardware Specifications, Rev. 3
- V
describe the SGMII SerDes transmitter and receiver AC-Coupled DC electrical characteristics.
SD2_TXn
2, 3, 5
Table 39. SGMII DC Transmitter Electrical Characteristics
|. |V
OD
| is also referred as output differential peak voltage. V
Symbol
I
X2V
Δ
SA
V
Δ
|V
VOH
Δ
VOL
V
|V
RING
R
V
OD
OS
, I
R
O
OD
OS
DD
O
SB
|
|
DD-Typ
=1.0V.
Ethernet: Enhanced Three-Speed Ethernet (eTSEC), MII Management
X2V
|V
OD
DD-Typ
0.95
Min
323
296
269
243
215
189
162
425
40
—
—
—
—
—
—
|
-max
/2 -
/2
DD-DIFF-p-p
Typ
500
459
417
376
333
292
250
500
1.0
—
—
—
—
—
—
—
—
DD-Typ
amplitude - power up default);
=1.0V, no common mode offset variation
X2V
|V
TX-DIFFp-p
OD
DD-Typ
Max
1.05
725
665
604
545
483
424
362
575
10
60
10
25
25
40
—
|
-max
/2 +
/2
= 2*|V
Unit
OD
mV
mV
mV
mV
mV
mV
mA
%
%
Ω
V
|
.
setting: 1.09x
setting: 1.33x
setting: 1.71x
Equalization
Equalization
Equalization
Equalization
Equalization
Equalization
Equalization
setting: 1.0x
setting: 1.2x
setting: 1.5x
setting: 2.0x
Figure
Notes
1, 4
—
—
—
—
—
—
—
1
1
30.
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