74AUP1G58FHX Fairchild Semiconductor, 74AUP1G58FHX Datasheet - Page 4

Gates (AND / NAND / OR / NOR) 2 Input, Low Power Config. Logic Gate

74AUP1G58FHX

Manufacturer Part Number
74AUP1G58FHX
Description
Gates (AND / NAND / OR / NOR) 2 Input, Low Power Config. Logic Gate
Manufacturer
Fairchild Semiconductor
Datasheet

Specifications of 74AUP1G58FHX

Product
Configurable
Logic Family
TinyLogic
Propagation Delay Time
1.3 ns to 3.4 ns
Supply Voltage (max)
3.6 V
Supply Voltage (min)
0.8 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Package / Case
Micropak2-6
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
© 2008 Fairchild Semiconductor Corporation
74AUP1G58 • Rev. 1.0.5
74AUP1G58 Logic Configurations
Figure 2 through Figure 8 show the logical functions
that can be implemented using the 74AUP1G58. The
diagrams show the DeMorgan’s equivalent logic duals
for
B
C
A
C
A
C
B
C
B
C
Figure 4.
Figure 2.
a
given
2-Input NOR Gate with Inverted A Input
Figure 6. 2-Input XOR Gate
2-Input AND with Inverted C Input or
2-Input NAND Gate or 2-Input OR
two-input
Y
Y
Y
Y
Y
with Both Inputs Inverted
A
B
B
A
function.
1
2
3
1
2
3
1
2
3
The
6
5
4
6
5
4
Y
6
5
4
Figure 8.
C
Y
C
Y
logical
V
V
C
Y
CC
CC
V
CC
4
A
Figure 5.
implementation is next to the board-level physical
implementation of how the pins of the function should
be connected.
A
C
A
C
Buffer
B
C
B
C
Figure 3.
B
1
2
3
2-Input OR Gate or 2-Input NAND Gate with
2-Input NOR Gate with Inverted C Input
2-Input AND with Inverted B Input or
6
5
4
Y
Y
Y
Figure 7. Inverter
Y
Y
Y
Both Inputs Inverted
B
B
V
A
CC
1
2
3
1
2
3
1
2
3
6
5
4
6
5
4
6
5
4
www.fairchildsemi.com
Y
V
C
Y
C
Y
CC
V
V
CC
CC

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