TC74VHC74FN(ELF,M) Toshiba, TC74VHC74FN(ELF,M) Datasheet

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TC74VHC74FN(ELF,M)

Manufacturer Part Number
TC74VHC74FN(ELF,M)
Description
Flip Flops Dual Flip-Flop
Manufacturer
Toshiba
Datasheet

Specifications of TC74VHC74FN(ELF,M)

Number Of Circuits
2
Logic Type
Dual D-Type Flip-Flop with Preset and Clear
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
Package / Case
SOL-14
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Dual D-Type Flip-Flop with Preset and Clear
FLOP fabricated with silicon gate C
Bipolar Schottky TTL while maintaining the CMOS low power
dissipation.
OUTPUT during the positive going transition of the CK pulse.
accomplished by setting the appropriate input low.
applied to the input pins without regard to the supply voltage.
This device can be used to interface 5 V to 3 V systems and two
supply systems such as battery back up. This circuit prevents
device destruction due to mismatched supply and input voltages.
Features
The TC74VHC74 is an advanced high speed CMOS D-FLIP
It achieves the high speed operation similar to equivalent
The signal level applied to the D INPUT is transferred to Q
An input protection circuit ensures that 0 to 5.5 V can be
CLR and PR are independent of the CK and are
High speed: f
Low power dissipation: I
High noise immunity: V
Power down protection is provided on all inputs.
Balanced propagation delays: t
Wide operating voltage range: V
Pin and function compatible with 74ALS74
TC74VHC74F,TC74VHC74FN,TC74VHC74FT,TC74VHC74FK
max
= 170 MHz (typ.) at V
TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic
Weight
SOP14-P-300-1.27A
SOP14-P-300-1.27
SOL14-P-150-1.27
TSSOP14-P-0044-0.65A : 0.06 g (typ.)
VSSOP14-P-0030-0.50
NIH
CC
= 2 μA (max) at Ta = 25°C
= V
pLH
NIL
CC (opr)
2
MOS technology.
∼ − t
= 28% V
pHL
CC
= 2 V to 5.5 V
= 5 V
CC
(min)
: 0.18 g (typ.)
: 0.18 g (typ.)
: 0.12 g (typ.)
: 0.02 g (typ.)
1
Note: The JEDEC SOP (FN) is not available in
TC74VHC74F
TC74VHC74FN
TC74VHC74FT
TC74VHC74FK
Japan.
TC74VHC74F/FN/FT/FK
2006-06-01

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TC74VHC74FN(ELF,M) Summary of contents

Page 1

... TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic TC74VHC74F,TC74VHC74FN,TC74VHC74FT,TC74VHC74FK Dual D-Type Flip-Flop with Preset and Clear The TC74VHC74 is an advanced high speed CMOS D-FLIP FLOP fabricated with silicon gate C It achieves the high speed operation similar to equivalent Bipolar Schottky TTL while maintaining the CMOS low power dissipation ...

Page 2

Pin Assignment 1 CLR 1CK GND 7 (top view) Truth Table Inputs Outputs CLR ...

Page 3

Recommended Operating Conditions (Note) Characteristics Supply voltage Input voltage Output voltage Operating temperature Input rise and fall time Note: The recommended operating conditions are required to ensure the normal operation of the device. Unused inputs must be tied to either ...

Page 4

Timing Requirements (input: t Characteristics Symbol Minimum pulse width (CK) Minimum pulse width ( CLR , PR ) Minimum set-up time Minimum hold time Minimum removal time ( CLR , Characteristics (input Characteristics Symbol Propagation ...

Page 5

Input Equivalent Circuit INPUT TC74VHC74F/FN/FT/FK 5 2006-06-01 ...

Page 6

Package Dimensions Weight: 0.18 g (typ.) TC74VHC74F/FN/FT/FK 6 2006-06-01 ...

Page 7

Package Dimensions Weight: 0.18 g (typ.) TC74VHC74F/FN/FT/FK 7 2006-06-01 ...

Page 8

Package Dimensions (Note) Note: This package is not available in Japan. Weight: 0.12 g (typ.) TC74VHC74F/FN/FT/FK 8 2006-06-01 ...

Page 9

Package Dimensions Weight: 0.06 g (typ.) TC74VHC74F/FN/FT/FK 9 2006-06-01 ...

Page 10

Package Dimensions Weight: 0.02 g (typ.) TC74VHC74F/FN/FT/FK 10 2006-06-01 ...

Page 11

... The information contained herein is presented only as a guide for the applications of our products. No responsibility is assumed by TOSHIBA for any infringements of patents or other rights of the third parties which may result from its use. No license is granted by implication or otherwise under any patents or other rights of TOSHIBA or the third parties. • ...

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