WM8751LSEFL/R Wolfson Microelectronics, WM8751LSEFL/R Datasheet
WM8751LSEFL/R
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WM8751LSEFL/R Summary of contents
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... QFN package, 5x5x0.9mm size, 0.5mm lead pitch APPLICATIONS • Digital Audio Player • MP3 Phone • Minidisc Player http://www.wolfsonmicro.com/enews/ WM8751L Production Data, August 2006, Rev 4.2 Copyright ©2006 Wolfson Microelectronics plc ...
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WM8751L DESCRIPTION .......................................................................................................1 FEATURES.............................................................................................................1 APPLICATIONS .....................................................................................................1 BLOCK DIAGRAM .................................................................................................1 TABLE OF CONTENTS .........................................................................................2 PIN CONFIGURATION...........................................................................................3 ORDERING INFORMATION ..................................................................................3 ABSOLUTE MAXIMUM RATINGS.........................................................................5 RECOMMENDED OPERATING CONDITIONS .....................................................5 ELECTRICAL CHARACTERISTICS ......................................................................6 TERMINOLOGY............................................................................................................. 7 OUTPUT PGA’S LINEARITY ......................................................................................... 8 SIGNAL TIMING REQUIREMENTS .....................................................................11 SYSTEM ...
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... Production Data PIN CONFIGURATION ORDERING INFORMATION ORDER CODE TEMPERATURE RANGE WM8751LSEFL -25°C to +85°C WM8751LSEFL/R -25°C to +85°C Note: Reel quantity = 3,500 w PACKAGE MOISTURE SENSITIVITY LEVEL 32-lead QFN (5x5x0.9mm) MSL1 (Pb-free) 32-lead QFN (5x5x0.9mm) MSL1 (Pb-free, tape and reel) WM8751L PEAK SOLDERING ...
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WM8751L PIN DESCRIPTION PIN NO NAME 1 MCLK 2 DCVDD 3 DBVDD 4 DGND Digital Input / Output 5 BCLK 6 DACDAT 7 DACLRC Digital Input / Output AGND2 10 MONOOUT 11 OUT3 12 ROUT1 13 LOUT1 ...
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Production Data ABSOLUTE MAXIMUM RATINGS Absolute Maximum Ratings are stress ratings only. Permanent damage to the device may be caused by continuously operating at or beyond these limits. Device functional operating limits and guaranteed performance specifications are given under Electrical ...
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WM8751L ELECTRICAL CHARACTERISTICS Test Conditions DCVDD = 1.5V, AVDD = HPVDD = 3.3V, T PARAMETER SYMBOL DAC to Line-Out (L/ROUT1 with 10kΩ / 50pF load) Signal to Noise Ratio (A-weighted) Total Harmonic Distortion Channel Separation Analogue Mixer Inputs (LINEINL/R to ...
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Production Data Test Conditions DCVDD = 1.5V, AVDD = HPVDD = 3.3V, T PARAMETER SYMBOL Digital Input / Output Input HIGH Level Input LOW Level Output HIGH Level Output LOW Level TERMINOLOGY 1. Signal-to-noise ratio (dB) - SNR is a ...
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WM8751L OUTPUT PGA’S LINEARITY 10 0 Output PGA Gains -10 -20 -30 -40 -50 -60 - 1.75 Output PGA Gain Step Size 1.5 1.25 1 0.75 0.5 0. XXXVOL ...
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Production Data HEADPHONE OUTPUT THD VERSUS POWER 0 Headphone Power vs THD+N (16 Ohm load) -20 -40 -60 -80 -100 Headphone Power vs THD+N (32 Ohm load) -20 -40 -60 -80 -100 ...
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WM8751L POWER CONSUMPTION The power consumption of the WM8751L depends on the following factors. • Supply voltages: Reducing the supply voltages also reduces supply currents, and therefore results in significant power savings. • Operating mode: Power consumption is lower in ...
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Production Data SIGNAL TIMING REQUIREMENTS SYSTEM CLOCK TIMING MCLK Figure 1 System Clock Timing Requirements Test Conditions CLKDIV2=0, DCVDD = 1.42V, DBVDD = 3.3V, DGND = 0V, T unless otherwise stated. PARAMETER System Clock Timing Information MCLK System clock pulse ...
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WM8751L Test Conditions DBVDD = 3.3V, DGND = 0V +25 A PARAMETER System Clock Timing Information DACLRC propagation delay from BCLK falling edge DACDAT setup time to BCLK rising edge DACDAT hold time from BCLK rising edge w ...
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Production Data AUDIO INTERFACE TIMING – SLAVE MODE t BCH BCLK DACLRC DACDAT Figure 3 Digital Audio Data Timing – Slave Mode (see Control Interface) Test Conditions DBVDD = 3.3V, DGND = 0V +25 A PARAMETER System Clock ...
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WM8751L Test Conditions DBVDD = 3.3V, DGND = 0V +25 A PARAMETER Program Register Input Information SCLK rising edge to CSB rising edge SCLK pulse cycle time SCLK pulse width low SCLK pulse width high SDIN to SCLK ...
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Production Data INTERNAL POWER ON RESET CIRCUIT AVDD Figure 6 Internal Power on Reset Circuit Schematic The WM8751 includes an internal Power-On-Reset Circuit, as shown in Figure 6, which is used to reset the digital logic into a default state ...
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WM8751L DEVICE DESCRIPTION INTRODUCTION The WM8751L is a low power audio DAC offering a combination of high quality audio, advanced features, low power and small size. These characteristics make it ideal for portable digital audio applications such as portable music ...
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Production Data DIGITAL VOLUME CONTROL The WM8751L has on-chip digital attenuation from –127dB to 0dB in 0.5dB steps, allowing the user to adjust the volume of each channel separately. The level of attenuation for an eight-bit code X is given ...
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WM8751L TONE CONTROL The WM8751L provides separate controls for bass and treble with programmable gains and filter characteristics. This function operates on digital audio data before it is passed to the audio DACs. Bass control can take two different forms: ...
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Production Data DIGITAL TO ANALOGUE CONVERTER (DAC) Treble and linear bass enhancement may produce signals that exceed full-scale. In order to avoid limiting under these conditions recommended to set the DAT bit to attenuate the digital input signal ...
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WM8751L LINE INPUTS AND OUTPUT MIXERS The WM8751L provides the option to mix the DAC output signal with analogue line-in signals from the LINEINL, LINEINR and MONOIN pins. The level of the mixed-in signals can be controlled with PGAs (Programmable ...
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Production Data REGISTER ADDRESS R36 (24h) Right Mixer (1) R37 (25h) Right Mixer (2) Table 8 Right Output Mixer Control REGISTER ADDRESS R38 (26h) Mono Mixer (1) R39 (27h) Mono Mixer (2) Table 9 Mono Output Mixer Control Note: The ...
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WM8751L DIFFERENTIAL MONO LINE-IN The WM8751L can take either a single-ended or a differential mono signal and mix it into the LOUT1/2 and ROUT1/2 outputs. In both cases, LINEINL and LINEINR still remain available as stereo line-in. Differential mono input ...
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Production Data ANALOGUE OUTPUTS ENABLING THE OUTPUTS Each analogue output of the WM8751L can be separately enabled or disabled. The analogue mixer associated with each output is powered on or off along with the output pin. All outputs are disabled ...
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WM8751L HEADPHONE SWITCH The HPDETECT pin can be used as a headphone switch control input to automatically disable the speaker output and enable the headphone output e.g. when a headphone is plugged into a jack socket. In this mode, enabled ...
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Production Data LOUT1/ROUT1 OUTPUTS The LOUT1 and ROUT1 pins can drive a 16Ω or 32Ω headphone or a line output (see Headphone Output and Line Output sections, respectively). The signal volume on LOUT1 and ROUT1 can be independently adjusted under ...
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WM8751L LOUT2/ROUT2 OUTPUTS The LOUT2 and ROUT2 output pins are essentially similar to LOUT1 and ROUT1, but they are independently controlled and can also drive an 8Ω mono speaker. For speaker drive, the ROUT2 signal must be inverted (ROUT2INV = ...
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Production Data DIGITAL AUDIO INTERFACE The digital audio interface is used for feeding audio data into the WM8751L. It uses three pins: • DACDAT: DAC data input • DACLRC: DAC data alignment clock • BCLK: Bit clock, for synchronisation The ...
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WM8751L DACLRC BCLK DACDAT Figure 15 Right Justified Audio Interface (assuming n-bit word length mode, the MSB is available on the second rising edge of BCLK following a DACLRC transition. The other bits up to the ...
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Production Data Figure 17 DSP/PCM Mode Audio Interface (mode A, LRP=0, Master) Figure 18 DSP/PCM Mode Audio Interface (mode B, LRP=1, Master) Figure 19 DSP/PCM Mode Audio Interface (mode A, LRP=0, Slave) w WM8751L PD Rev 4.2 August 2006 29 ...
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WM8751L Figure 20 DSP/PCM Mode Audio Interface (mode B, LRP=0, Slave) AUDIO INTERFACE CONTROL The register bits controlling audio format, word length and master / slave mode are summarised below. REGISTER ADDRESS R7 (07h) Digital Audio Interface Format Table 20 ...
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Production Data w WM8751L PD Rev 4.2 August 2006 31 ...
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WM8751L MASTER CLOCK AND AUDIO SAMPLE RATES The WM8751L supports a wide range of master clock frequencies on the MCLK pin, and can generate many commonly used audio sample rates directly from the master clock. There are two clocking modes: ...
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Production Data MCLK MCLK MCLKDIV2=0 MCLKDIV2=1 ‘Normal’ Clock Mode (‘*’ indicates backward compatibility with WM8711 and WM8721) 12.288MHz 24.576MHz 11.2896MHz 22.5792MHz 18.432MHz 36.864MHz 16.9344MHz 33.8688MHz USB Mode (assumes BCLKDIV2=0. ‘*’ indicates backward compatibility with WM8711 and WM8721) 12.000MHz 24.000MHz Table ...
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WM8751L CONTROL INTERFACE SELECTION OF CONTROL MODE The WM8751L is controlled by writing to registers through a serial control interface. A control word consists of 16 bits. The first 7 bits (B15 to B9) are address bits that select which ...
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Production Data Figure 22 2-Wire Serial Control Interface The WM8751L has two possible device addresses, which can be selected using the CSB pin. CSB STATE Table 24 2-Wire MPU Interface Address Selection POWER SUPPLIES The WM8751L can use up to ...
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WM8751L POWER MANAGEMENT The WM8751L has two control registers that allow users to select which functions are active. For minimum power consumption, unused functions should be disabled. To avoid any pop or click noise important to enable or ...
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Production Data STOPPING THE MASTER CLOCK In order to minimise power consumed in the digital core of the WM8751L, the master clock should be stopped in Standby and OFF modes. If this is cannot be done externally at the clock ...
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WM8751L REGISTER MAP REGISTER ADDRESS REMARKS (BIT 15 – (00h) 0000000 Reserved R1 (01h) 0000001 Reserved R2 (02h) 0000010 LOUT1 R3 (03h) 0000011 ROUT1 R4 (04h) 0000100 Reserved R5 (05h) 0000101 DAC Control R6 (06h) 0000110 Reserved R7 ...
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Production Data DIGITAL FILTER CHARACTERISTICS Depending on the MCLK frequency and sample rate selected, 4 different types of digital filter can be used in the DAC, called Type and 3 (see “Master Clock and Audio Sample Rates”). ...
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WM8751L 0 -20 -40 -60 -80 -100 0 0.5 1 1.5 Frequency (Fs) Figure 25 DAC Filter Frequency Response – Type 1 0 -20 -40 -60 -80 -100 0 0.5 1 1.5 Frequency (Fs) Figure 27 DAC Filter Frequency Response ...
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Production Data APPLICATIONS INFORMATION RECOMMENDED EXTERNAL COMPONENTS Figure 31 Recommended External Component Diagram w WM8751L PD Rev 4.2 August 2006 41 ...
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WM8751L MINIMISING POP NOISE AT THE ANALOGUE OUTPUTS To minimise any pop or click noise when the system is powered up or down, the following procedures are recommended. POWER UP • Switch on power supplies. By default the WM8751L is ...
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Production Data HEADPHONE OUTPUT CONFIGURATION The analogue outputs LOUT1/ROUT1, LOUT2/ROUT2, and OUT3 can drive a 16Ω or 32Ω headphone load, either through DC blocking capacitors coupled without any capacitor. Headphone Output using DC blocking WM8751L Figure 33 Recommended ...
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WM8751L PACKAGE DIMENSIONS FL: 32 PIN QFN PLASTIC PACKAGE 5 CORNER D2 TIE BAR B D2 EXPOSED 6 GROUND PADDLE BOTTOM VIEW (A3) 1 SIDE VIEW C SEATING PLANE ...
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... Production Data IMPORTANT NOTICE Wolfson Microelectronics plc (“Wolfson”) products and services are sold subject to Wolfson’s terms and conditions of sale, delivery and payment supplied at the time of order acknowledgement. Wolfson warrants performance of its products to the specifications in effect at the date of shipment. Wolfson reserves the right to make changes to its products and specifications or to discontinue any product or service without notice ...