TOTX177A(F,T) Toshiba, TOTX177A(F,T) Datasheet - Page 22

• Manufacturer Part Number: TOTX177A(F,T)
• Description: Fiber Optic Transmitters, Receivers, Transceivers Toslink Transmitter Panel Mount 15Mbps
• Manufacturer: Toshiba

Specifications of TOTX177A(F,T)

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

General Technology (System ASICs)
Toshiba leverages its industry-leading microfabrication technology
to increase chip density and reduce power dissipation, widening the
possibilities of system ASICs.
Speed Density
MHz
200
100
10
IP Cores
1
A/D and D/A Converters
PCI Express : Cont., PHY
3.3-V Single Power Supply
Serial-ATA : Cont., PHY
ATA-66/100 : Cont., I/O
Memory Stick PRO
TX, ARM, MeP, TLCS
PCI33/66 : Cont., I/O
TC190
3.3-V/5-V Mixed
UART(16550)
DDR1, DDR2
SDRAM I/F
SDHC
0.6 μm
TC200
TC203
MPU
ATA
PCI
5-V Single Power Supply
6
Supports 5-V devices to the cutting-edge devices
0.4 μm
TC220
TC223
High-Speed
Toshiba ASIC Process Roadmap
TM
0.3 μm
8
Middle-Speed
TC260
2.0 : Device, Host, PHY
1.1 : Device, Host, I/O
10
SHA-1, MD5, RNG
0.18 μm
DES/3DES, AES
TC280
IEEE1394
Link, PHY
Low-Speed
Mini LVDS
HDMI Rx
Cipher
0.13 μm
USB
RSDS
LVDS
DVI
TC300
12
90 nm
TC320
: ADC
: DAC
Bit Precision
65 nm
14
Year
Toshiba offers a gallery of IP cores for system ASICs, including
TX49 RISC cores, TLCS-900 CISC cores, DRAM cores and
interface cores. Toshiba is also designing discrete components in
such a manner as to make it easy to implement them as ASIC-ready
IP cores. (Some of the following IP cores are under development.)
With high memory data transfer rates and low power consumption,
EDRAM SoCs enable high-performance and high-value-added
systems. EDRAM SoCs also reduce system board area.
— SoCs with synchronous DRAMs and fast-access DRAMs
■
●
●
●
●
●
●
●
●
Image Compression
A/D, D/A, APLL
High performance with fast data transfer rates due to wide on-chip
memory buses
Much denser than SRAM
Low power
Soft error prevention
System architecture optimization and reduction of discrete components
Easy and effective testing with a direct-access test and DRAM BIST
High yield through redundancy in DRAM macros
Various types of DRAM macros with configurable depth and width
Toshiba's EDRAMs offer the following features and benefits:
Analog Cells
Cores MPEG
SDRAM (SDR/DDR/DDR2/MOBILE-DDR)
I/O Cells
System ASIC Implementation
Embedded DRAM Cores
Up to 133 MHz or 266 MHz
CMOS
32 kHz/1 to 66 MHz
Up to 1 GHz
TTL/LVTTL
LVDS
HSTL
OSC
GTL
USB, IEEE 1394,
Interface Cores
ATA
Pull-Up, Pull-Down
Low Noise, High Speed
PLL
CPU
RISC (TX49, ARM, MeP)
DRAM
CISC (TLCS-900)
SRAM
Processor
FIFO
Image
Random Logic
Random
Analog
Logic
PCI-33/-66/-Express
ATA-66/-100/Serial
Cell
3.3-V-Tolerant
Up to 1.5 GHz
5-V-Tolerant
ATA
PCI
High-Performance and
Dual-Voltage Interfaces
PLL
Memory (SRAM)
Memory (DRAM)
Large-Capacity
(Rambus, PCI, LVDS)
DLL
High-Speed
23