SI3010-FS Silicon Laboratories Inc, SI3010-FS Datasheet - Page 52
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SI3010-FS
Manufacturer Part Number
SI3010-FS
Description
IC SI2401 LINE-SIDE DAA 16SOIC
Manufacturer
Silicon Laboratories Inc
Datasheet
1.SI3010-FS.pdf
(94 pages)
Specifications of SI3010-FS
Data Format
V.92
Interface
Serial
Voltage - Supply
3 V ~ 3.6 V
Mounting Type
Surface Mount
Package / Case
16-SOIC (0.154", 3.90mm Width)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Baud Rates
-
Lead Free Status / RoHS Status
Compliant, Lead free / RoHS Compliant
Other names
336-1096
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
SI3010-FS
Manufacturer:
SILICON LABS/芯科
Quantity:
20 000
Company:
Part Number:
SI3010-FSR
Manufacturer:
SiliconLa
Quantity:
2 155
Part Number:
SI3010-FSR
Manufacturer:
VISHAY/威世
Quantity:
20 000
Si3018/19/10
Register 4. Interrupt Source
Reset settings = 0000_0000
52
Bit
7
6
5
4
3
2
Name
Type
Bit
LCSOI
Name
ROVI
DODI
RDTI
BTDI
FDTI
RDTI
R/W
D7
Ring Detect Interrupt.
0 = A ring signal is not occurring.
1 = A ring signal is detected. If the RDTM (Register 3) and INTE (Register 2) bits are set a hard-
ware interrupt occurs on the AOUT/INT pin. This bit must be written to a 0 to be cleared. The RDI
bit (Register 2) determines if this bit is set only at the beginning of a ring pulse, or at the end of a
ring pulse as well. This bit should be cleared after clearing the PDL bit (Register 6) because pow-
ering up the line-side device may cause this interrupt to be triggered.
Receive Overload Interrupt.
0 = An excessive input level on the receive pin is not occurring.
1 = An excessive input level on the receive pin is detected. If the ROVM and INTE bits are set a
hardware interrupt occurs on the AOUT/INT pin. This bit must be written to 0 to clear it. This bit is
identical in function to the ROV bit (Register 17). Clearing this bit also clears the ROV bit.
Frame Detect Interrupt .
0 = Frame detect is established on the communications link.
1 = This bit is set when the communications link does not have frame lock. If the FDTM and INTE
bits are set, a hardware interrupt occurs on the AOUT/INT pin. Once set, this bit must be written
to a 0 to be cleared.
Billing Tone Detect Interrupt.
0 = A billing tone has not occurred.
1 = A billing tone has been detected. If the BTDM and INTE bits are set, a hardware interrupt
occurs on the AOUT/INT pin. This bit must be written to 0 to clear it.
Drop Out Detect Interrupt .
0 = The line-side power supply has not collapsed.
1 = The line-side power supply has collapsed (The DOD bit in Register 19 has fired). If the
DODM and INTE bits are set, a hardware interrupt occurs on the AOUT/INT pin. This bit must be
written to 0 to be cleared. This bit should be cleared after clearing the PDL bit (Register 6)
because powering as the line-side device can cause this interrupt to be triggered.
Loop Current Sense Overload Interrupt .
0 = The LCS bits have not reached max value (all ones).
1 = The LCS bits have reached max value. If the LCSOM bit (Register 3) and the INTE bit are
set, a hardware interrupt occurs on the AOUT/INT pin. This bit must be written to 0 to be cleared.
LCSOI does not necessarily imply that an overcurrent situation has occurred. An overcurrent sit-
uation in the DAA is determined by the status of the OPD bit (Register 19). After the LCSOI inter-
rupt fires, the OPD bit should be checked to determine if an overcurrent situation exists.
ROVI
R/W
D6
FDTI
R/W
D5
BTDI
R/W
D4
DODI
R/W
D3
Rev. 1.05
LCSOI
R/W
D2
Function
DLCSI
R/W
D1
POLI
R/W
D0