USB4640-HZH-03 SMSC, USB4640-HZH-03 Datasheet - Page 24

• Manufacturer Part Number: USB4640-HZH-03
• Description: IC HSIC USB / FLASH CTRLR 48QFN
• Manufacturer: SMSC

Specifications of USB4640-HZH-03

• Design Resources: USB4640 Schematic
• Controller Type: HSIC USB 2.0 Hub, Flash Media
• Interface: I²C, Serial, SPI, USB
• Voltage - Supply: 3.3V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 48-VFQFN Exposed Pad
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Current - Supply: -
• Other names: 638-1113

Revision 1.0 (06-09-09)
6.4
After power-on reset, the internal firmware checks for an external SPI flash device that contains a valid
signature of "2DFU" (device firmware upgrade) beginning at address 0xFFFA. If a valid signature is
found, then the external ROM is enabled and code execution begins at address 0x0000 in the external
SPI device. Otherwise, code execution continues from the internal ROM.
If there is no SPI ROM detected, the internal firmware then checks for the presence of an I
The firmware looks for the signature ‘ATA2’ at the offset of FCh-FFh and ‘ecf1’ at the offset of 17Ch-
17Fh in the I
internally. Please refer to
configuration options.
The SPI ROM required for the USB4640/USB4640i is a recommended minimum of 1 Mbit and support
either 30 MHz or 60 MHz. The frequency used is set using the SPI_SPD_SEL. For 30 MHz operation,
this pin must be pulled to ground through a 100 kΩ resistor. For 60 MHz operation, this pin must pulled
up through a 100 kΩ resistor.
The SPI_SPD_SEL pin is used to choose the speed of the SPI interface. During nRESET assertion,
this pin will be tri-stated with the weak pull-down resistor enabled. When nRESET is negated, the value
on the pin will be internally latched, and the pin will revert to SPI_DO functionality. The internal pull-
down will be disabled.
The firmware can determine the speed of operation on the SPI port by checking the SPI_SPEED in
the SPI_CTL register (0x2400 - RESET = 0x02). Both 1- and 2-bit SPI operation is supported. For
optimum throughput, a 2-bit SPI ROM is recommended. Both mode 0 and mode 3 SPI ROMS are also
supported.
ROM BOOT Sequence
USB4640/40i
USB4640/40i
2
C ROM. The firmware reads in the I
Section 8.3.2, "EEPROM Data Descriptor," on page 29
Figure 6.4 SPI ROM Connection
Figure 6.5 I
SPI_CE_n
SPI_CLK / GPIO4 / SCL
SPI_DO / GPIO5 / SDA / SPI_SPD_SEL
SPI_DI
DATASHEET
High Speed Inter-Chip (HSIC) USB 2.0 Hub and Flash Media Controller
2
24
C Connection
2
C ROM to configure the hardware and software
3. 3 V
3. 3 V
10 K
10 K
SCL
SDA
CE#
CLK
SI
SO
SMSC USB4640/USB4640i
I
SPI ROM
2
C ROM
for the details of the
Datasheet
2
C ROM.