73S8024RN-20IMR/F Maxim Integrated Products, 73S8024RN-20IMR/F Datasheet - Page 12
![no-image](/images/manufacturer_photos/0/4/417/maxim_integrated_products_sml.jpg)
73S8024RN-20IMR/F
Manufacturer Part Number
73S8024RN-20IMR/F
Description
IC SMART CARD INTERFACE 20-QFN
Manufacturer
Maxim Integrated Products
Datasheet
1.73S8024RN-DB.pdf
(27 pages)
Specifications of 73S8024RN-20IMR/F
Controller Type
Smart Card Interface
Voltage - Supply
2.7 V ~ 5.5 V
Current - Supply
2.7mA
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
20-VFQFN Exposed Pad
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Interface
-
73S8024RN Data Sheet
8 Deactivation Sequence
Deactivation is initiated either by the system controller by setting the CMDVCC high, or automatically in
the event of hardware faults. Hardware faults are over-current, overheating, V
and card extraction during the session. To be noted that V
fault is generated when V
The following steps show the deactivation sequence and the timing of the card control signals when the
system controller sets the CMDVCC high or OFF goes low due to a fault or card removal:
•
•
•
•
12
RST goes low at the end of t
CLK is set low at the end of t
I/O goes low at the end of t
V
CC
is shut down at the end of time t
CMDVCC
VCC
OFF
RST
CLK
I/O
t
t
t
t
t
1
2
3
4
5
PC
-- OR --
= > 0.5µs, timing by 1.5MHz internal Oscillator
= > 7.5µs
= > 0.5µs
= > 0.5µs
= depends on V
goes lower than V
3
. Out of reception mode.
1
For NDS application, C
2
.
.
Figure 4: Deactivation Sequence
t
1
4
. After a delay t
CC
t
2
filter capacitor.
CC
.
t
3
F
=1µF makes t
5
(discharge of the V
PC
t
4
and V
CC
faults are linked together so that a
1
+ t
2
+ t
t
CC
5
3
DD
+ t
capacitor), V
fault, V
4
+ t
5
PC
DS_8024RN_020
< 100µs
fault, V
CC
is low.
Rev. 1.9
CC
fault,