PK60X256VMD100 Freescale Semiconductor, PK60X256VMD100 Datasheet - Page 59

• Manufacturer Part Number: PK60X256VMD100
• Description: IC ARM CORTEX MCU 256K 144-MAP
• Manufacturer: Freescale Semiconductor
• Series: Kinetisr

Specifications of PK60X256VMD100

• Core Processor: ARM Cortex-M4
• Core Size: 32-Bit
• Speed: 100MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, IrDA, SDHC, SPI, UART/USART, USB, USB OTG
• Peripherals: DMA, I²S, LVD, POR, PWM, WDT
• Number Of I /o: 100
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 64K x 8
• Voltage - Supply (vcc/vdd): 1.71 V ~ 3.6 V
• Data Converters: A/D 33x16b, D/A 2x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 105°C
• Package / Case: 144-LBGA
• Processor Series: Kinetis
• Core: ARM Cortex M4
• Data Ram Size: 64 KB
• Interface Type: UART, SPI, I2C, I2S, CAN
• Maximum Clock Frequency: 100 MHz
• Number Of Programmable I/os: 100
• Operating Supply Voltage: 1.71 V to 3.6 V
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

6.8.7 DSPI switching specifications (high-speed mode)
The DMA Serial Peripheral Interface (DSPI) provides a synchronous serial bus with
master and slave operations. Many of the transfer attributes are programmable. The tables
below provide DSPI timing characteristics for classic SPI timing modes. Refer to the
DSPI chapter of the Reference Manual for information on the modified transfer formats
used for communicating with slower peripheral devices.
Freescale Semiconductor, Inc.
DS10
DS11
DS12
DS13
DS14
DS15
DS16
Num
Num
DS9
DSPI_SS
DSPI_SCK
(CPOL=0)
DSPI_SOUT
DSPI_SIN
Operating voltage
Frequency of operation
DSPI_SCK input cycle time
DSPI_SCK input high/low time
DSPI_SCK to DSPI_SOUT valid
DSPI_SCK to DSPI_SOUT invalid
DSPI_SIN to DSPI_SCK input setup
DSPI_SCK to DSIP_SIN input hold
DSPI_SS active to DSPI_SOUT driven
DSPI_SS inactive to DSPI_SOUT not driven
Operating voltage
Frequency of operation
Table 41. Master mode DSPI timing (high-speed mode)
Table 40. Slave mode DSPI timing (low-speed mode)
Figure 25. DSPI classic SPI timing — slave mode
K60 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011.
DS13
DS15
Description
Description
Table continues on the next page...
First data
First data
DS14
Preliminary
DS10
DS12
Data
Data
Peripheral operating requirements and behaviors
(t
DS11
8 x t
SCK
1.71
Min.
Min.
2.7
15
DS9
—
—
—
—
—
0
5
/2) - 4
BCLK
Last data
Last data
DS16
(t
SCK/2)
Max.
Max.
6.25
3.6
3.6
20
15
15
25
—
—
—
—
+ 4
MHz
MHz
Unit
Unit
ns
ns
ns
ns
ns
ns
ns
ns
V
V
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