PK20N512VLQ100 Freescale Semiconductor, PK20N512VLQ100 Datasheet - Page 60
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PK20N512VLQ100
Manufacturer Part Number
PK20N512VLQ100
Description
IC ARM CORTEX MCU 512K 144-LQFP
Manufacturer
Freescale Semiconductor
Series
Kinetisr
Datasheet
1.PK20X128VLQ100.pdf
(74 pages)
Specifications of PK20N512VLQ100
Core Processor
ARM Cortex-M4
Core Size
32-Bit
Speed
100MHz
Connectivity
CAN, EBI/EMI, I²C, IrDA, SDHC, SPI, UART/USART, USB, USB OTG
Peripherals
DMA, I²S, LVD, POR, PWM, WDT
Number Of I /o
100
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
128K x 8
Voltage - Supply (vcc/vdd)
1.71 V ~ 3.6 V
Data Converters
A/D 33x16b, D/A 2x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 105°C
Package / Case
144-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PK20N512VLQ100
Manufacturer:
FSL
Quantity:
55
Company:
Part Number:
PK20N512VLQ100
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Peripheral operating requirements and behaviors
6.8.9 SDHC specifications
The following timing specs are defined at the chip I/O pin and must be translated
appropriately to arrive at timing specs/constraints for the physical interface.
60
Num
SD1
SD2
SD3
SD4
SD5
SD6
SD7
SD8
SDHC_CLK
Output SDHC_CMD
Output SDHC_DAT[3:0]
Input SDHC_CMD
Input SDHC_DAT[3:0]
Symbol
t
t
t
t
f
t
t
t
fpp
fpp
fpp
TLH
THL
THL
THL
OD
WL
WH
OD
SDHC output / card inputs SDHC_CMD, SDHC_DAT (reference to SDHC_CLK)
SDHC input / card inputs SDHC_CMD, SDHC_DAT (reference to SDHC_CLK)
Operating voltage
Clock frequency (low speed)
Clock frequency (SD\SDIO full speed)
Clock frequency (MMC full speed)
Clock frequency (identification mode)
Clock low time
Clock high time
Clock rise time
Clock fall time
SDHC output delay (output valid)
SDHC input setup time
SDHC input hold time
Description
K20 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011.
Table 41. SDHC switching specifications
SD3
SD6
Figure 26. SDHC timing
SD2
SD7
Card input clock
Preliminary
SD8
SD1
Min.
2.7
—
—
-5
0
0
0
0
7
7
5
0
Freescale Semiconductor, Inc.
Max.
400
400
3.6
6.5
25
20
—
—
—
—
3
3
MHz
MHz
Unit
kHz
kHz
ns
ns
ns
ns
ns
ns
ns
V