MC9S08JE128VMB Freescale Semiconductor, MC9S08JE128VMB Datasheet - Page 30

IC MCU 8BIT 128K FLASH 81MAPBGA

MC9S08JE128VMB

Manufacturer Part Number
MC9S08JE128VMB
Description
IC MCU 8BIT 128K FLASH 81MAPBGA
Manufacturer
Freescale Semiconductor
Series
HCS08r
Datasheet

Specifications of MC9S08JE128VMB

Core Processor
HCS08
Core Size
8-Bit
Speed
48MHz
Connectivity
I²C, SCI, SPI, USB
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
47
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
12K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 8x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 105°C
Package / Case
81-LBGA
Processor Series
S08JE
Core
HCS08
Data Bus Width
8 bit
Data Ram Size
12 KB
Maximum Clock Frequency
48 MHz
Operating Supply Voltage
- 0.3 V to + 3.8 V
Maximum Operating Temperature
+ 105 C
3rd Party Development Tools
EWS08
Development Tools By Supplier
TWR-SER, TWR-ELEV, TWR-MCF51JE-KIT, TWR-S08JE128-KIT, TWR-LCD
Minimum Operating Temperature
- 40 C
On-chip Adc
12 bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MC9S08JE128VMB
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Preliminary Electrical Characteristics
3
4
5
6
7
30
This specification applies to any time the PLL VCO divider or reference divider is changed, or changing from PLL
disabled (BLPE, BLPI) to PLL enabled (PBE, PEE). If a crystal/resonator is being used as the reference, this
specification assumes it is already running.
Jitter is the average deviation from the programmed frequency measured over the specified interval at maximum f
Measurements are made with the device powered by filtered supplies and clocked by a stable external clock signal.
Noise injected into the FLL circuitry via V
percentage for a given interval.
625 ns represents 5 time quanta for CAN applications, under worst-case conditions of 8 MHz CAN bus clock, 1 Mbps
CAN Bus speed, and 8 time quanta per bit for bit time settings. 5 time quanta is the minimum time between a
synchronization edge and the sample point of a bit using 8 time quanta per bit.
Below D
if the MCG is already in lock, then the MCG may stay in lock.
Below D
lock.
#
1
2
3
4
5
Oscillator crystal or resonator
(EREFS = 1, ERCLKEN = 1)
Load capacitors
Feedback resistor
Series resistor — Low range
Series resistor — High range
unl
lock
minimum, the MCG will not exit lock if already in lock. Above D
minimum, the MCG is guaranteed to enter lock. Above D
Table 18. XOSC (Temperature Range = –40 to 105
Characteristic
Low range
(32 kHz to 38.4 kHz)
High range
(1 MHz to 16 MHz)
Low Gain (HGO = 0)
High Gain (HGO = 1)
• Low range (RANGE = 0)
• High range (RANGE = 1),
• FEE or FBE mode
• High range (RANGE = 1),
• High gain (HGO = 1),
• FBELP mode
• High range (RANGE = 1),
• Low power (HGO = 0),
• FBELP mode
• Low Gain (HGO = 0)
• High Gain (HGO = 1)
DD
Preliminary — Subject to Change
and V
SS
≥ 8 MHz
4 MHz
1 MHz
and variation in crystal oscillator frequency increase the C
2
lock
unl
maximum, the MCG will not enter lock. But
Symbol
maximum, the MCG is guaranteed to exit
R
R
C
C
R
fhi
fhi
fhi
f
lo
S
S
1
2
F
°
C Ambient)
Min
32
1
1
1
Typ
100
10
See Note
1
0
0
0
0
Freescale Semiconductor
1
3
Max
38.4
16
10
20
5
8
0
BUS
Jitter
.
MHz
MHz
MHz
Unit
kHz

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