ATMEGA32A-AN Atmel, ATMEGA32A-AN Datasheet - Page 288

• Manufacturer Part Number: ATMEGA32A-AN
• Description: IC MCU AVR 32K FLASH 44TQFP
• Manufacturer: Atmel
• Series: AVR® ATmegar

Specifications of ATMEGA32A-AN

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 32
• Program Memory Size: 32KB (16K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 1K x 8
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 44-TQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

26.10.8
26.10.9
26.10.10 Programming Command Register
8155C–AVR–02/11
Reset Register
Programming Enable Register
The Reset Register is a Test Data Register used to reset the part during programming. It is
required to reset the part before entering programming mode.
A high value in the Reset Register corresponds to pulling the external Reset low. The part is
reset as long as there is a high value present in the Reset Register. Depending on the Fuse set-
tings for the clock options, the part will remain reset for a Reset Time-out Period (refer to
Sources” on page
not latched, so the reset will take place immediately, as shown in
The Programming Enable Register is a 16-bit register. The contents of this register is compared
to the programming enable signature, binary code 1010_0011_0111_0000. When the contents
of the register is equal to the programming enable signature, programming via the JTAG port is
enabled. The register is reset to 0 on Power-on Reset, and should always be reset when leaving
Programming mode.
Figure 26-13. Programming Enable Register
The Programming Command Register is a 15-bit register. This register is used to serially shift in
programming commands, and to serially shift out the result of the previous command, if any. The
JTAG Programming Instruction Set is shown in
in the programming commands is illustrated in
• Virtual Flash Page Load Register
• Virtual Flash Page Read Register
TDO
TDI
D
A
A
T
26) after releasing the Reset Register. The output from this Data Register is
$A370
=
ClockDR & PROG_ENABLE
Figure
Table
D
26-16.
Q
26-15. The state sequence when shifting
Programming Enable
Figure 24-2 on page
ATmega32A
235.
“Clock
288