ATTINY12V-1SUR Atmel, ATTINY12V-1SUR Datasheet - Page 13

IC AVR MCU 1K FLASH 4MHZ 8-SOIC

ATTINY12V-1SUR

Manufacturer Part Number
ATTINY12V-1SUR
Description
IC AVR MCU 1K FLASH 4MHZ 8-SOIC
Manufacturer
Atmel
Series
AVR® ATtinyr
Datasheets

Specifications of ATTINY12V-1SUR

Core Processor
AVR
Core Size
8-Bit
Speed
1.2MHz
Peripherals
POR, WDT
Number Of I /o
6
Program Memory Size
1KB (512 x 16)
Program Memory Type
FLASH
Eeprom Size
64 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Processor Series
ATTINY12
Core
AVR8
Data Bus Width
8 bit
Data Ram Size
64 B
Interface Type
SPI
Maximum Clock Frequency
1.2 MHz
Operating Supply Voltage
1.8 V to 5.5 V
Mounting Style
SMD/SMT
Operating Temperature Range
- 40 C to + 85 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Ram Size
-
Data Converters
-
Connectivity
-
Lead Free Status / Rohs Status
 Details
Memories
I/O Memory
Program and Data
Addressing Modes
1006F–AVR–06/07
The I/O space definition of the ATtiny11/12 is shown in the following table:
Table 5. ATtiny11/12 I/O Space
Note:
All the different ATtiny11/12 I/O and peripherals are placed in the I/O space. The differ-
ent I/O locations are accessed by the IN and OUT instructions transferring data between
the 32 general-purpose working registers and the I/O space. I/O registers within the
address range $00 - $1F are directly bit-accessible using the SBI and CBI instructions.
In these registers, the value of single bits can be checked by using the SBIS and SBIC
instructions. Refer to the Instruction Set Summary for more details.
For compatibility with future devices, reserved bits should be written to zero if accessed.
Reserved I/O memory addressed should never be written.
The different I/O and peripherals control registers are explained in the following
sections.
The ATtiny11/12 AVR RISC Microcontroller supports powerful and efficient addressing
modes. This section describes the different addressing modes supported in the
ATtiny11/12. In the figures, OP means the operation code part of the instruction word.
To simplify, not all figures show the exact location of the addressing bits.
Address Hex
$1D
$1C
$3F
$3B
$3A
$39
$38
$35
$34
$33
$32
$31
$21
$1E
$18
$17
$16
$08
Reserved and unused locations are not shown in the table.
Name
SREG
GIMSK
GIFR
TIMSK
TIFR
MCUCR
MCUSR
TCCR0
TCNT0
OSCCAL
WDTCR
EEAR
EEDR
EECR
PORTB
DDRB
PINB
ACSR
Device
ATtiny11/12
ATtiny11/12
ATtiny11/12
ATtiny11/12
ATtiny11/12
ATtiny11/12
ATtiny11/12
ATtiny11/12
ATtiny11/12
ATtiny12
ATtiny11/12
ATtiny12
ATtiny12
ATtiny12
ATtiny11/12
ATtiny11/12
ATtiny11/12
ATtiny11/12
Function
Status Register
General Interrupt Mask Register
General Interrupt Flag Register
Timer/Counter Interrupt Mask Register
Timer/Counter Interrupt Flag Register
MCU Control Register
MCU Status Register
Timer/Counter0 Control Register
Timer/Counter0 (8-bit)
Oscillator Calibration Register
Watchdog Timer Control Register
EEPROM Address Register
EEPROM Data Register
EEPROM Control Register
Data Register, Port B
Data Direction Register, Port B
Input Pins, Port B
Analog Comparator Control and Status Register
ATtiny11/12
13

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