ATTINY9-MAH Atmel, ATTINY9-MAH Datasheet - Page 26
ATTINY9-MAH
Manufacturer Part Number
ATTINY9-MAH
Description
IC MCU AVR 1K FLASH 8UDFN
Manufacturer
Atmel
Series
AVR® ATtinyr
Specifications of ATTINY9-MAH
Core Processor
AVR
Core Size
8-Bit
Speed
12MHz
Peripherals
POR, PWM, WDT
Number Of I /o
4
Program Memory Size
1KB (512 x 16)
Program Memory Type
FLASH
Ram Size
32 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
8-UFDFN Exposed Pad
Core
AVR8
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-
Connectivity
-
Lead Free Status / Rohs Status
Details
Available stocks
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Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
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Manufacturer:
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7.4.2
26
ATtiny4/5/9/10
PRR – Power Reduction Register
• Bits 3:1 – SM2..SM0: Sleep Mode Select Bits 2..0
These bits select between available sleep modes, as shown in
Table 7-2.
Note:
• Bit 0 – SE: Sleep Enable
The SE bit must be written to logic one to make the MCU enter the sleep mode when the SLEEP
instruction is executed. To avoid the MCU entering the sleep mode unless it is the programmer’s
purpose, it is recommended to write the Sleep Enable (SE) bit to one just before the execution of
the SLEEP instruction and to clear it immediately after waking up.
• Bits 7:2 – Res: Reserved Bits
These bits are reserved and will always read zero.
• Bit 1 – PRADC: Power Reduction ADC
Writing a logic one to this bit shuts down the ADC. The ADC must be disabled before shut down.
The analog comparator cannot use the ADC input MUX when the ADC is shut down.
The ADC is available in ATtiny5/10, only.
• Bit 0 – PRTIM0: Power Reduction Timer/Counter0
Writing a logic one to this bit shuts down the Timer/Counter0 module. When the Timer/Counter0
is enabled, operation will continue like before the shutdown.
Bit
0x35
Read/Write
Initial Value
SM2
0
0
0
0
1
1
1
1
1. This mode is available in all devices, although only ATtiny5/10 are equipped with an ADC
Sleep Mode Select
R
7
–
0
SM1
0
0
1
1
0
0
1
1
R
6
–
0
R
5
–
0
SM0
0
1
0
1
0
1
0
1
R
4
–
0
Sleep Mode
Idle
ADC noise reduction
Power-down
Reserved
Standby
Reserved
Reserved
Reserved
3
–
R
0
R
2
–
0
Table
PRADC
R/W
1
0
(1)
7-2.
PRTIM0
R/W
0
0
8127D–AVR–02/10
PRR
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