NUC120LE3AN Nuvoton Technology Corporation of America, NUC120LE3AN Datasheet - Page 538
![IC MCU 32BIT 128KB FLASH 48LQFP](/photos/28/73/287353/nuc120le3an_sml.jpg)
NUC120LE3AN
Manufacturer Part Number
NUC120LE3AN
Description
IC MCU 32BIT 128KB FLASH 48LQFP
Manufacturer
Nuvoton Technology Corporation of America
Series
NuMicro™r
Specifications of NUC120LE3AN
Core Processor
ARM Cortex-M0
Core Size
32-Bit
Speed
50MHz
Connectivity
I²C, IrDA, SPI, UART/USART, USB
Peripherals
Brown-out Detect/Reset, DMA, I²S, LVD, POR, PS2, PWM, WDT
Number Of I /o
31
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
2.5 V ~ 5.5 V
Data Converters
A/D 8x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
48-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
NUC120LE3AN
Manufacturer:
Nuvoton Technology Corporation of America
Quantity:
10 000
Part Number:
NUC120LE3AN
Manufacturer:
NUVOTON
Quantity:
20 000
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PDMA Global Interrupt Status Register (PDMA_GCRISR)
Register
PDMA_GCRISR
Bits
[31]
[30:9]
[8]
[7]
[6]
[5]
[4]
INTR7
INTR
31
23
15
7
NuMicro™ NUC100 Series Technical Reference Manual
Descriptions
INTR
Reserved
INTR8
INTR7
INTR6
INTR5
INTR4
INTR6
Offset
PDMA_BA_GCR+0x0C R
30
22
14
6
INTR5
Interrupt Pin Status
This bit is the Interrupt pin status of PDMA controller.
Note: This bit is read only
Reserved
Interrupt Pin Status of Channel 8 (Medium Density Only)
This bit is the Interrupt pin status of PDMA channel8.
Note: This bit is read only
Interrupt Pin Status of Channel 7 (Medium Density Only)
This bit is the Interrupt pin status of PDMA channel7.
Note: This bit is read only
Interrupt Pin Status of Channel 6 (Medium Density Only)
This bit is the Interrupt pin status of PDMA channel6.
Note: This bit is read only
Interrupt Pin Status of Channel 5 (Medium Density Only)
This bit is the Interrupt pin status of PDMA channel5.
Note: This bit is read only
Interrupt Pin Status of Channel 4 (Medium Density Only)
This bit is the Interrupt pin status of PDMA channel4.
Note: This bit is read only
29
21
13
5
R/W
Reserved
INTR4
Description
28
20
12
PDMA Global Interrupt Status Register
4
- 538 -
Reserved
Reserved
INTR3
27
19
11
3
Publication Release Date: Dec. 22, 2010
INTR2
26
18
10
2
INTR1
25
17
9
1
Revision V1.06
Reset Value
0x0000_0000
INTR8
INTR0
24
16
8
0
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