M058ZAN Nuvoton Technology Corporation of America, M058ZAN Datasheet - Page 317

• Manufacturer Part Number: M058ZAN
• Description: IC MCU 32BIT 32KB FLASH 33QFN
• Manufacturer: Nuvoton Technology Corporation of America
• Series: NuMicro M051™r

Specifications of M058ZAN

• Core Processor: ARM Cortex-M0
• Core Size: 32-Bit
• Speed: 50MHz
• Connectivity: I²C, IrDA, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LVD, POR, PWM, WDT
• Number Of I /o: 24
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 5.5 V
• Data Converters: A/D 5x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 33-WFQFN Exposed Pad
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

6.11.4.6 Continuous Scan Mode
NuMicro M051
In continuous scan mode, A/D conversion is performed sequentially on the specified channels
that enabled by CHEN bits in ADCHER register (maximum 8 channels for ADC). The operations
are as follows:
1. When the ADST bit in ADCR is set to 1 by software or external trigger input, A/D conversion
2. When A/D conversion for each enabled channel is completed, the result of each enabled
3. When all enabled channel sequentially completes A/D converting once, the ADF bit (ADSR[0])
4. Steps 2 to 3 are repeated as long as the ADST bit remains set to 1. When the ADST bit is
starts on the channel with the lowest number.
channel is stored in the A/D data register corresponding to each enabled channel.
will be set to 1. If the ADIE bit is set to 1 at this time, an ADINT interrupt is requested after A/D
conversion ends. Conversion of the 1st enabled channel starts again.
cleared to 0, A/D conversion stops and the A/D converter enters the idle state. When ADST is
cleared to 0, ADC controller will finish current conversion and the result of the lowest enabled
ADC channel will become unpredictable.
SAR[11:0]
chsel[2:0]
sample
ADDR0
ADDR2
ADDR3
ADDR7
ADST
Figure 6.11-5 Single-Cycle Scan on Enabled Channels Timing Diagram
Single-cycle scan on channel 0, 2, 3 and 7 (ADCHER[7:0] = 0x10001101b)
0x000
™
Series Technical Reference Manual
R0
R0
0x010
- 317 -
R2
R2
Publication Release Date: Sept 14, 2010
0x011
R3
R3
0x111
R7
Revision V1.2
R7