XC2V3000-4BFG957I Xilinx Inc, XC2V3000-4BFG957I Datasheet - Page 84
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XC2V3000-4BFG957I
Manufacturer Part Number
XC2V3000-4BFG957I
Description
IC FPGA VIRTEX-II 957FCBGA
Manufacturer
Xilinx Inc
Series
Virtex™-IIr
Datasheet
1.XC2V250-4FGG256C.pdf
(318 pages)
Specifications of XC2V3000-4BFG957I
Number Of Labs/clbs
3584
Total Ram Bits
1769472
Number Of I /o
684
Number Of Gates
3000000
Voltage - Supply
1.425 V ~ 1.575 V
Mounting Type
Surface Mount
Operating Temperature
-40°C ~ 100°C
Package / Case
957-BBGA, FCBGA
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Number Of Logic Elements/cells
-
Available stocks
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Part Number:
XC2V3000-4BFG957I
Manufacturer:
Xilinx Inc
Quantity:
10 000
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Input Clock Tolerances
Table 39: Input Clock Tolerances
DS031-3 (v3.5) November 5, 2007
Product Specification
Notes:
1.
2.
3.
Input Clock Low/High Pulse Width
PSCLK
PSCLK and CLKIN
Input Clock Cycle-Cycle Jitter (Low Frequency Mode)
CLKIN (using DLL outputs)
CLKIN (using CLKFX outputs)
Input Clock Cycle-Cycle Jitter (High Frequency Mode)
CLKIN (using DLL outputs)
CLKIN (using CLKFX outputs)
Input Clock Period Jitter (Low Frequency Mode)
CLKIN (using DLL outputs)
CLKIN (using CLKFX outputs)
Input Clock Period Jitter (High Frequency Mode)
CLKIN (using DLL outputs)
CLKIN (using CLKFX outputs)
Feedback Clock Path Delay Variation
CLKFB off-chip feedback
“DLL outputs” is used here to describe the outputs: CLK0, CLK90, CLK180, CLK270, CLK2X, CLK2X180, and CLKDV.
If both DLL and CLKFX outputs are used, follow the more restrictive specification.
If DCM phase shift feature is used and CLKIN frequency > 200 Mhz, CLKIN duty cycle must be within ±5% (45/55 to 55/45).
Description
R
(3)
(1)
(1)
(1)
(1)
(2)
(2)
(2)
(2)
PSCLK_PULSE
PSCLK_PULSE and
CLKIN_PULSE
CLKIN_CYC_JITT_DLL_HF
CLKIN_PER_JITT_DLL_HF
CLKIN_CYC_JITT_DLL_LF
CLKIN_PER_JITT_DLL_LF
CLKFB_DELAY_VAR_EXT
CLKIN_CYC_JITT_FX_HF
CLKIN_PER_JITT_FX_HF
CLKIN_CYC_JITT_FX_LF
CLKIN_PER_JITT_FX_LF
Symbol
www.xilinx.com
< 1MHz
1 – 10 MHz
10 – 25 MHz
25 – 50 MHz
50 – 100 MHz
100 – 150 MHz
150 – 200 MHz
200 – 250 MHz
250 – 300 MHz
300 – 350 MHz
350 – 400 MHz
> 400 MHz
Virtex-II Platform FPGAs: DC and Switching Characteristics
Constraints
F
CLKIN
25.00
25.00
10.00
5.00
3.00
2.40
2.00
1.80
1.50
1.30
1.15
1.05
Min
-6
±300
±300
±150
±150
Max
±1
±1
±1
±1
±1
25.00
25.00
10.00
Speed Grade
5.00
3.00
2.40
2.00
1.80
1.50
1.30
1.15
1.05
Min
-5
±300
±300
±150
±150
Max
±1
±1
±1
±1
±1
25.00
25.00
10.00
5.00
3.00
2.40
2.00
1.80
1.50
1.30
1.15
1.05
Min
-4
±300
±300
±150
±150
Max
±1
±1
±1
±1
±1
Module 3 of 4
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ps
ps
ps
ps
ns
ns
ns
ns
ns
36
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