XC3S500E-4FG320I Xilinx Inc, XC3S500E-4FG320I Datasheet - Page 157

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XC3S500E-4FG320I

Manufacturer Part Number
XC3S500E-4FG320I
Description
IC FPGA SPARTAN 3E 320FBGA
Manufacturer
Xilinx Inc
Series
Spartan™-3Er
Datasheet

Specifications of XC3S500E-4FG320I

Number Of Logic Elements/cells
10476
Number Of Labs/clbs
1164
Total Ram Bits
368640
Number Of I /o
232
Number Of Gates
500000
Voltage - Supply
1.14 V ~ 1.26 V
Mounting Type
Surface Mount
Operating Temperature
-40°C ~ 100°C
Package / Case
320-BGA
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant

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Table 119: Configuration Timing Requirements for Attached SPI Serial Flash
DS312-3 (v3.8) August 26, 2009
Product Specification
Notes:
1.
2.
T
T
T
T
f
C
Symbol
CCS
DSU
DH
V
or f
These requirements are for successful FPGA configuration in SPI mode, where the FPGA provides the CCLK frequency. The post
configuration timing can be different to support the specific needs of the application loaded into the FPGA and the resulting clock source.
Subtract additional printed circuit board routing delay as required by the application.
R
R
SPI serial Flash PROM chip-select time
SPI serial Flash PROM data input setup time
SPI serial Flash PROM data input hold time
SPI serial Flash PROM data clock-to-output time
Maximum SPI serial Flash PROM clock frequency (also depends
on specific read command used)
Description
www.xilinx.com
T
T
T
CCS
V
f
DSU
DC and Switching Characteristics
C
T
DH
T
Requirement
------------------------------ -
T
MCCLn
T
T
CCLKn min
MCCL1
MCCL1
T
MCCH1
1
(
T
DCC
T
)
T
CCO
CCO
Units
MHz
ns
ns
ns
ns
157

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