XRT94L33IB-L Exar Corporation, XRT94L33IB-L Datasheet - Page 73
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XRT94L33IB-L
Manufacturer Part Number
XRT94L33IB-L
Description
IC MAPPER DS3/E3/STS-1 504TBGA
Manufacturer
Exar Corporation
Specifications of XRT94L33IB-L
Applications
Network Switches
Interface
Bus
Voltage - Supply
3.14 V ~ 3.47 V
Package / Case
504-LBGA
Mounting Type
Surface Mount
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
XRT94L33IB-L
Manufacturer:
Exar Corporation
Quantity:
10 000
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REV. 1.0.1
PIN DESCRIPTION OF THE XRT94L31 (REV. B)
PIN #
AF10
AG9
G24
C17
E25
B18
STS1RXD_C1J1_0
TXDS3LINECLK_0
STS1RXD_C1J1_1
TXDS3LINECLK_1
STS1RXD_C1J1_2
TXDS3LINECLK_2
STS1RXD_DP_0
STS1RXD_DP_1
STS1RXD_DP_2
SIGNAL NAME
TXDS3POS_0
TXDS3POS_1
TXDS3POS_2
I/O
O
O
CMOS
CMOS
TYPE
STS-1 Receive Telecom Bus - C1/J1 Byte Phase Indicator Output
Signal - Channel n:
The function of this output pin depends upon whether or not the STS-1
Telecom Bus Interface for Channel n has been enabled.
If STS-1 Telecom Bus (Channel n) has been enabled - STS-1
Receive Telecom Bus - C1/J1 Byte Phase Indicator Output Signal:
This output pin pulses "High" under the following two conditions.When-
ever the C1 byte is being output via the STS1RXD_D_0[7:0] output, and
Whenever the J1 byte is being output via the STS1RXD_D_0[7:0] out-
put.
N
TXDS3LINECLK_0 (Transmit DS3/E3/STS-1 line clock to LIU - Chan-
nel n)
STS-1 Receive (Drop) Telecom Bus - Parity Output pin - Channel n:
The function of this output pin depends upon whether or not the STS-1
Telecom Bus Interface for Channel n has been enabled.
If STS-1 Telecom Bus (Channel n) has been enabled
- STS-1 Receive Telecom Bus - Parity Output pin:
This output pin can be configured to function as one of the following.
The EVEN or ODD parity value of the bits which are output via the
STS1RXD_D_0[7:0] output pins.
The EVEN or ODD parity value of the bits which are being output via the
STS1RXD_D_0[7:0] output pins and the states of the STS1RXD_PL_0
and STS1RXD_C1J1_0 output pins.
This output pin will ultimately be used (by drop-side circuitry) to verify the
verify of the data which is output via the STS-1 Telecom Bus Interface
associated with Channel n.
N
OTES
OTE
1. The STS-1 Receive (Drop) Telecom Bus (associated with
2. The STS-1 Receive (Drop) Telecom Bus (associated with
: The user can make any one of these configuration selections by
3-CHANNEL DS3/E3/STS-1 TO STS-3/STM-1 MAPPER IC
:
writing the appropriate value into the Telecom Bus Control
Register (Address Location = 0x013B).TXDS3POS_0 (Transmit
DS3/E3/STS-1 line data positive to LIU- Channel n)
Channel n) will indicate that it is transmitting the C1 byte (via
the STS1RXD_D_0[7:0] output pins), by pulsing this output pin
"High" (for one period of STS1RXD_CK_0) and keeping the
STS1RXD_PL_0 output pin pulled "Low".
Channel n) will indicate that it is transmitting the J1 byte (via the
STS1RXD_D_0[7:0] output pins), by pulsing this output pin
"High" (for one period of STS1RXD_CK_0) while the
STS1TXD_PL_0 output pin is pulled "High".
73
DESCRIPTION
XRT94L31
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