PIC16F1824-I/ML Microchip Technology, PIC16F1824-I/ML Datasheet - Page 144

• Manufacturer Part Number: PIC16F1824-I/ML
• Description: IC PIC MCU 8BIT 14KB FLSH 16QFN
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 16Fr

Specifications of PIC16F1824-I/ML

• Core Size: 8-Bit
• Program Memory Size: 7KB (4K x 14)
• Core Processor: PIC
• Speed: 32MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 11
• Program Memory Type: FLASH
• Eeprom Size: 256 x 8
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 16-VQFN Exposed Pad
• Controller Family/series: PIC16F
• No. Of I/o's: 12
• Eeprom Memory Size: 256Byte
• Ram Memory Size: 256Byte
• Cpu Speed: 32MHz
• No. Of Timers: 5
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

PIC16(L)F1824/1828
REGISTER 13-6:
TABLE 13-1:
DS41419B-page 144
bit 7
Legend:
R = Readable bit
u = Bit is unchanged
‘1’ = Bit is set
bit 7-4
bit 3-0
ANSELA
ANSELB
INLVLA
INLVLB
INTCON
IOCAF
IOCAN
IOCAP
IOCBF
IOCBN
IOCBP
TRISA
TRISB
Legend: — = unimplemented location, read as ‘0’. Shaded cells are not used by Interrupt-on-Change.
Note 1:
R/W-0/0
IOCBF7
Name
(1)
(1)
(1)
(1)
(1)
(1)
PIC16F/LF1828 only.
IOCBF<7:4>: Interrupt-on-Change PORTB Flag bits
1 = An enabled change was detected on the associated pin.
0 = No change was detected, or the user cleared the detected change.
Unimplemented: Read as ‘0’
INLVLB7
IOCBN7
IOCBF7
IOCBP7
TRISB7
ANSB7
SUMMARY OF REGISTERS ASSOCIATED WITH INTERRUPT-ON-CHANGE
Bit 7
GIE
R/W-0/0
IOCBF6
—
—
—
—
—
—
Set when IOCBPx = 1 and a rising edge was detected on RAx, or when IOCANx = 1 and a falling edge
was detected on RBx.
IOCBF: INTERRUPT-ON-CHANGE PORTB FLAG REGISTER
(PIC16F/LF1828 ONLY)
INLVLB6
IOCBN6
IOCBF6
IOCBP6
TRISB6
ANSB6
PEIE
Bit 6
W = Writable bit
x = Bit is unknown
‘0’ = Bit is cleared
—
—
—
—
—
—
R/W-0/0
IOCBF5
INLVLA5
INLVLB5
TMR0IE
IOCAN5
IOCAP5
IOCBN5
IOCBP5
IOCAF5
IOCBF5
TRISA5
TRISB5
ANSB5
Bit 5
—
R/W-0/0
IOCBF4
INLVLA4
INLVLB4
Preliminary
IOCAN4
IOCAP4
IOCBN4
IOCBP4
IOCAF4
IOCBF4
TRISA4
TRISB4
ANSA4
ANSB4
INTE
Bit 4
U = Unimplemented bit, read as ‘0’
-n/n = Value at POR and BOR/Value at all other Resets
HS - Bit is set in hardware
INLVLA3
IOCAN3
IOCAF3
IOCAP3
TRISA3
IOCIE
Bit 3
U-0
—
—
—
—
—
—
—
—
INLVLA2
TMR0IF
IOCAN2
IOCAP2
IOCAF2
TRISA2
ANSA2
Bit 2
—
—
—
—
—
—
U-0
—
INLVLA1
IOCAN1
IOCAP1
IOCAF1
TRISA1
ANSA1
INTF
Bit 1
 2010 Microchip Technology Inc.
—
—
—
—
—
—
U-0
—
INLVLA0
IOCAN0
IOCAF0
IOCAP0
TRISA0
ANSA0
IOCIF
Bit 0
—
—
—
—
—
—
Register
on Page
U-0
—
127
133
128
133
142
142
142
144
143
143
126
132
93
bit 0