ATA556711-TAQY Atmel, ATA556711-TAQY Datasheet - Page 6

IC IDIC R/W 330BIT 0PF 8-SOIC

ATA556711-TAQY

Manufacturer Part Number
ATA556711-TAQY
Description
IC IDIC R/W 330BIT 0PF 8-SOIC
Manufacturer
Atmel
Series
ATA5567r
Datasheet

Specifications of ATA556711-TAQY

Rf Type
Read / Write
Frequency
100kHz ~ 150kHz
Features
E5550, e5551, T5557 Binary Compatible
Package / Case
8-SOIC (0.154", 3.90mm Width)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
4. Operating the ATA5567
4.1
6
Initialization and POR Delay
ATA5567
Figure 3-4.
ACL
MFC
UID
LotID
Wafer#
DW
The Power-On-Reset (POR) circuit remains active until an adequate voltage threshold has been
reached. This threshold will be reached also if the coil voltage ramps up in terms of a few volts
per second. It means that the tag can be moved slowly towards the reader without performance
loss. This in turn triggers the default start-up delay sequence. During this configuration period of
about 192 field clocks, the ATA5567 is initialized with the configuration data stored in EEPROM
block 0. During initialization of the configuration block 0, for all ATA55670x variants the load
damping is active permanently (see
damping option) achieve a longer read range based on the lower activation field strength.
If the POR-delay bit is reset, no additional delay is observed after the configuration period. Tag
modulation in regular-read mode will be observed about 3 ms after entering the RF field. If the
POR delay bit is set, the ATA5567 remains in a permanent damping state until 8190 internal
field clocks have elapsed.
T
Any field gap occurring during this initialization phase will restart the complete sequence. After
this initialization time the ATA5567 enters regular-read mode and modulation starts automati-
cally using the parameters defined in the configuration register.
INIT
= (192 + 8190
CID
ICR
Bit value
Example:
Block 1
Block 2
Bit No.
Bit No.
Allocation class as defined in ISO/IEC 15963-1 = E0h
Manufacturer code of Atmel Corporation as defined in ISO/IEC 7816-6 = 15h
UID issuer identifier on request (respectively 5 bit CID and 3 bit ICR)
Customer ID on request
IC revision
5-digit lot number, e.g., “41557”
5 bits for wafer#
15 bits encoded as sequential die on wafer number
ATA5567 Traceability Data Structure
POR delay)
63 MSB
31
1
1
"557"
"E0"
ACL
...
LotID
12
...
8
T
Figure 4-5 on page
C
9
12
67 ms; T
MFC
"15"
...
13
Wafer #
16
...
...
...
C
= 8 µs at 125 kHz
17
17
CID
10). The ATA55671x types (without
18
"00"
...
20
ICR
24
...
DW
25
LotID
"41"
LSB
...
8
31
32
32
32
0
4874F–RFID–07/08

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