SI4032-B1-FM Silicon Laboratories Inc, SI4032-B1-FM Datasheet - Page 40
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SI4032-B1-FM
Manufacturer Part Number
SI4032-B1-FM
Description
IC TX 240-930MHZ 1-20DB 20VQFN
Manufacturer
Silicon Laboratories Inc
Type
ISM Transmitterr
Datasheet
1.SI4031-B1-FMR.pdf
(58 pages)
Specifications of SI4032-B1-FM
Package / Case
20-VQFN
Frequency
240MHz ~ 930MHz
Applications
General Purpose
Modulation Or Protocol
FSK, GFSK, OOK
Data Rate - Maximum
256 kbps
Power - Output
20dBm
Current - Transmitting
30mA
Data Interface
PCB, Surface Mount
Antenna Connector
PCB, Surface Mount
Voltage - Supply
1.8 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Operating Frequency
240 MHz to 930 MHz
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Operating Supply Voltage
1.8 V to 3.6 V
Supply Current
85 mA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
-
Memory Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
SI4032-B1-FMR
Manufacturer:
MURATA
Quantity:
2 210
Part Number:
SI4032-B1-FMR
Manufacturer:
SILICON LABS/芯科
Quantity:
20 000
Si4030/31/32-B1
7.2. Microcontroller Clock
The 30 MHz crystal oscillator frequency is divided down internally and may be output to the microcontroller through
GPIO2. This feature is useful to lower BOM cost by using only one crystal in the system. The system clock
frequency is selectable from one of 8 options, as shown below. Except for the 32.768 kHz option, all other
frequencies are derived by dividing the crystal oscillator frequency. The 32.768 kHz clock signal is derived from an
internal RC oscillator or an external 32 kHz crystal. The default setting for GPIO2 is to output the microcontroller
clock signal with a frequency of 1 MHz.
If the microcontroller clock option is being used there may be the need of a system clock for the microcontroller
while the Si4030/31/32 is in SLEEP mode. Since the crystal oscillator is disabled in SLEEP mode in order to save
current, the low-power 32.768 kHz clock can be automatically switched to become the microcontroller clock. This
feature is called enable low frequency clock and is enabled by the enlfc bit in “Register 0Ah. Microcontroller Output
Clock." When enlfc = 1 and the chip is in SLEEP mode then the 32.768 kHz clock will be provided to the
microcontroller as the system clock, regardless of the setting of mclk[2:0]. For example, if mclk[2:0] = 000, 30 MHz
will be provided through the GPIO output pin to the microcontroller as the system clock in all IDLE or TX states.
When the chip enters SLEEP mode, the system clock will automatically switch to 32.768 kHz from the RC oscillator
or 32.768 XTAL.
Another available feature for the microcontroller clock is the clock tail, clkt[1:0] in “Register 0Ah. Microcontroller
Output Clock." If the low frequency clock feature is not enabled (enlfc = 0), then the system clock to the
microcontroller is disabled in SLEEP mode. However, it may be useful to provide a few extra cycles for the
microcontroller to complete its operation prior to the shutdown of the system clock signal. Setting the clkt[1:0] field
will provide additional cycles of the system clock before it shuts off.
If an interrupt is triggered, the microcontroller clock will remain enabled regardless of the selected mode. As soon
as the interrupt is read the state machine will then move to the selected mode. The minimum current consumption
will not be achieved until the interrupt is read. For instance, if the chip is commanded to SLEEP mode but an
interrupt has occurred the 30 MHz XTAL will not be disabled until the interrupt has been cleared.
40
Add R/W
0A
R/W
Microcontroller Output Clock
Function/Description
clkt[1:0]
mclk[2:0]
00
01
10
11
000
001
010
011
100
101
110
111
D7
D6
Rev 1.1
Clock Frequency
clkt[1]
D5
32.768 kHz
128 cycles
256 cycles
Clock Tail
512 cycles
0 cycles
30 MHz
15 MHz
10 MHz
4 MHz
3 MHz
2 MHz
1 MHz
clkt[0]
D4
enlfc
D3
mclk[2] mclk[1] mclk[0]
D2
D1
D0
POR Def.
0Bh