ATA6285N-PNQW Atmel, ATA6285N-PNQW Datasheet - Page 12

• Manufacturer Part Number: ATA6285N-PNQW
• Description: IC CTRL/XMITTER 315MHZ 32-VQFN
• Manufacturer: Atmel

Specifications of ATA6285N-PNQW

• Frequency: 315MHz
• Applications: TPM (Tire Pressure Monitor)
• Modulation Or Protocol: ASK, FSK
• Data Rate - Maximum: 20 kbps
• Power - Output: 6dBm
• Current - Transmitting: 8.5mA
• Data Interface: PCB, Surface Mount
• Antenna Connector: PCB, Surface Mount
• Memory Size: 4KB ROM, 1KB RAM, 1KB EEPROM
• Voltage - Supply: 2 V ~ 3.6 V
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 32-VQFN Exposed Pad, 32-HVQFN, 32-SQFN, 32-DHVQFN
• Processor Series: ATA6x
• Core: AVR8
• Data Bus Width: 8 bit
• Program Memory Type: Flash
• Program Memory Size: 128 KB
• Data Ram Size: 512 B
• Interface Type: SPI
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 85
• Number Of Timers: 9
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWAVR, EWAVR-BL
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Lead Free Status / Rohs Status: Details

4.5.1
4.5.1.1
12
ATA6285N/ATA6286N [Preliminary]
Transmission with ENABLE = Open
ASK Mode
With ASK = High the power amplifier is switched on. This is used to perform the ASK modula-
tion. During ASK modulation the IC is enabled with the FSK or the ENABLE pin.
With FSK = Low the switch at pin XTO2 is closed, with FSK = High the switch is open. To
achieve a faster start-up of the crystal oscillator, the FSK pin should be High during start-up of
the XTO because the series resistance of the resonator seen from pin XTO1 is lower if the
switch is off.
The different modes of the ATA6285N/ATA6286N are listed in
Table 4-1.
The ATA6285N/ATA6286N is activated by ENABLE = open, FSK = High, ASK = Low. The
microcontroller is then switched to external clocking. After typically 0.6 ms, the CLK driver is acti-
vated automatically (i.e., the microcontroller waits until the XTO and CLK are ready). After
another time period of 250 µs, the PLL is locked and ready to transmit. The output power can
then be modulated by means of pin ASK. After transmission, ASK is switched to Low and the
microcontroller returns back to internal clocking. Then, the ATA6285N/ATA6286N is switched to
power-down mode with FSK = Low.
Figure 4-2.
ASK Pin
Low
Low
Low
High
High
Low/High
High
ASK
FSK
CLK
Transmitter Part
Timing ASK Mode with ENABLE Open
FSK Pin
Low
Low
High
Low
High
High
Low/High
Power-down
T
ENABLE Pin
Low/open
High
High/open
High/open
High/open
Low
Low
XTO
Power-up,
PA off
> 250 µs
Power-up,
(High)
PA on
Mode
Power-down mode, FSK switch High Z
Power-up, PA off, FSK switch Low Z
Power-up, PA off, FSK switch High Z
Power-up, PA on, FSK switch Low Z
Power-up, PA on, FSK switch High Z
Idle mode, FSK switch High Z
Idle mode, FSK switch High Z
Power-up,
PA off
(Low)
Table
4-1.
Power-down
4958BS–AUTO–01/09