ZMN2405HP-E RFM, ZMN2405HP-E Datasheet - Page 4
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ZMN2405HP-E
Manufacturer Part Number
ZMN2405HP-E
Description
MODULE ZIGBEE 2.4GHZ END DEVC
Manufacturer
RFM
Series
ZMNr
Datasheet
1.ZMN2405HPDB.pdf
(6 pages)
Specifications of ZMN2405HP-E
Frequency
2.4GHz
Data Rate - Maximum
250kbps
Modulation Or Protocol
802.15.4
Applications
Mesh, p2p Networks
Power - Output
18dBm
Sensitivity
-95dBm
Voltage - Supply
3.3 V ~ 5.5 V
Current - Receiving
33mA
Current - Transmitting
130mA
Data Interface
PCB, Surface Mount
Antenna Connector
PCB, Surface Mount
Operating Temperature
-40°C ~ 85°C
Package / Case
Module
Wireless Frequency
2.4 GHz
Interface Type
SPI, UART
Modulation
DSSS, OQPSK
Operating Voltage
3.3 VDC to 5.5 VDC
Output Power
100 mW
Operating Temperature Range
- 40 C to + 85 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Memory Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
For Use With/related Products
CC2430
Other names
583-1018
ZMN2405HP I/O Pad Descriptions
17 - 20
33-34
Pad
10
11
12
13
14
15
16
21
22
23
24
25
26
27
28
29
30
31
32
35
36
37
38
39
1
2
3
4
5
6
7
8
9
SPI_SCLK
UART_RX
SPI_MOSI
SPI_MISO
UART_TX
ADC REF
LINK/DD
ACT/DC
/RESET
/RESET
SPI_EN
PWMA
PWMB
GPIO0
GPIO1
GPIO2
GPIO3
GPIO4
GPIO5
ADCX
ADCY
Name
ADCZ
RFIO
GND
GND
GND
GND
GND
GND
GND
GND
VCC
NC
NC
NC
Power supply input, +3.3 to +5.5 Vdc.
Power supply and signal ground. Connect to the host circuit board ground.
Pulse-width modulated output A. Provides a DAC function when used with an external low-pass filter.
Pulse-width modulated output B. Provides a DAC function when used with an external low-pass filter.
Configurable digital I/O port 0. When configured as an output, the power-on state is also configurable.
Configurable digital I/O port 1. When configured as an output, the power-on state is also configurable.
Configurable digital I/O port 2. When configured as an output, the power-on state is also configurable.
Configurable digital I/O port 3. When configured as an output, this high current port can sink up to 20 mA. The
power-on output state is also configurable.
Configurable digital I/O port 4. When configured as an output, the power-on state is also configurable.
Configurable digital I/O port 5. When configured as an output, the power-on state is also configurable.
Power supply and signal ground. Connect to the host circuit board ground.
Output signal indicating module’s link status in default mode. Also used by JTAG interface as Data Output.
Active low hardware reset. Hold this input low when the power supply is below 2.7 V. In parallel with pad 24.
Output signal indicating RF data activity. Also used by JTAG interface as Data Clock Input.
No connection.
Module’s +3.3 V regulated suppy, used for ratiometric ADC readings. Current drain on this output should be no
greater than 5 mA.
Power supply and signal grounds. Connect to the host circuit board ground.
Serial data input to UART.
Serial data output from UART.
No connection.
Active low hardware reset. Hold this input low when the power supply is below 2.7 V. In parallel with pad 13.
7- to 12-bit ADC input X. ADC full scale can be referenced to +3.3 V supply or internal +2.5 V reference.
7- to 12-bit ADC input Y. ADC full scale can be referenced to +3.3 V supply or internal +2.5 V reference.
7- to 12-bit ADC input Z. ADC full scale can be referenced to +3.3 V supply or internal +2.5 V reference.
Power supply and signal ground. Connect to the host circuit board ground.
Active-low enable output for SPI bus devices.
SPI port clock signal.
SPI port data output.
SPI port data input.
Power supply and signal ground. Connect to the host circuit board ground.
No connection.
Power supply and signal ground. Connect to the host circuit board ground.
RF ground. Connect to the host circuit board ground plane, and to shield when using coaxial cable.
RF port. Connect the antenna to this port with a 50 Ω stripline or semi-rigid coaxial cable.
RF ground. Connect to the host circuit board ground plane, and to shield when using coaxial cable.
4
Description