ATA5429-PLSW Atmel, ATA5429-PLSW Datasheet - Page 45
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ATA5429-PLSW
Manufacturer Part Number
ATA5429-PLSW
Description
IC TXRX ASK/FSK 915MHZ 48QFN
Manufacturer
Atmel
Specifications of ATA5429-PLSW
Frequency
915MHz
Data Rate - Maximum
20kbps
Modulation Or Protocol
ASK, FSK
Applications
Alarm, ISM, Telemetry
Power - Output
5dBm
Sensitivity
-112.5dBm
Voltage - Supply
2.4 V ~ 3.6 V or 4.4 V ~ 6.6 V
Current - Receiving
10.5mA
Current - Transmitting
10mA
Data Interface
PCB, Surface Mount
Antenna Connector
PCB, Surface Mount
Operating Temperature
-40°C ~ 85°C
Package / Case
48-VQFN Exposed Pad, 48-HVQFN, 48-SQFN, 48-DHVQFN
Operating Temperature (min)
-40C
Operating Temperature (max)
85C
Operating Temperature Classification
Industrial
Product Depth (mm)
7mm
Product Height (mm)
0.9mm
Product Length (mm)
7mm
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Memory Size
-
Lead Free Status / Rohs Status
Compliant
4841D–WIRE–10/07
If the transceiver is in any active mode (IDLE, AUX, TX, RX, RX_Polling), an integrated
debounce logic is active. If there is an event on pin Tn a debounce counter is set to 0 (T = 0) and
started. The status is updated, an interrupt is issued and the debounce counter is stopped after
reaching the counter value T = 8195
An event on the same key input before reaching T = 8195
An event on an other key input before reaching T = 8195
debounce counter.
While the debounce counter is running, the bits VSOUT_EN and CLK_ON in control register 3
are set to “1”.
The interrupt is deleted after reading the status register or executing the command Delete_IRQ.
If pin Tn is not used, it can be left open because of an internal pull-up resistor (typically 50 k ).
Figure 7-3.
Start debounce counter
Stop debounce counter
Timing Flow Pin Tn, Status Bit STn
RX Polling Mode or
Event on Pin Tn ?
Event on Pin Tn ?
IDLE Mode or
AUX Mode or
TX Mode or
Tn = STn ?
RX Mode
T = 0
ATA5423/ATA5425/ATA5428/ATA5429
Y
Y
Y
N
N
N
T
Stop debounce counter
DCLK
T = 8195
Pin Tn = 0 ?
.
STn = 1
IRQ = 1
Y
Y
T ?
N
N
T
DCLK
Stop debounce counter
T
DCLK
stops the debounce counter.
STn = 0
IRQ = 1
resets and restarts the
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