SI4421-A1-FT Silicon Laboratories Inc, SI4421-A1-FT Datasheet - Page 18

• Manufacturer Part Number: SI4421-A1-FT
• Description: IC TXRX FSK 915MHZ 3.8V 16-TSSOP
• Manufacturer: Silicon Laboratories Inc

Specifications of SI4421-A1-FT

• Package / Case: 16-TSSOP
• Frequency: 433MHz, 868MHz, 915MHz
• Data Rate - Maximum: 256kbps
• Modulation Or Protocol: FSK
• Power - Output: 7dbm
• Sensitivity: -110dBm
• Voltage - Supply: 2.2 V ~ 3.6 V
• Current - Receiving: 15mA
• Current - Transmitting: 28mA
• Data Interface: PCB, Surface Mount
• Antenna Connector: PCB, Surface Mount
• Operating Temperature: -40°C ~ 85°C
• Number Of Receivers: 2
• Number Of Transmitters: 2
• Wireless Frequency: 433 MHz to 915 MHz
• Interface Type: SPI
• Output Power: 5 dBm to 7 dBm
• Operating Supply Voltage: 2.2 V to 3.8 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Maximum Supply Current: 25 mA
• Minimum Operating Temperature: - 40 C
• Modulation: FSK
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Applications: -
• Memory Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 336-1631-5

Bits 9-8 (d1 to d0):
VDI Logic Diagram:
Slow mode: The VDI signal will go high only if the DRSSI, DQD and the CR_LOCK (Clock Recovery Locked) signals present at the same
time. It stays high until any of the abovementioned signals present; it will go low when all the three input signals are low.
Medium mode: The VDI signal will be active when the CR_LOCK signal and either the DRSSI or the DQD signal is high. The valid data
indicator will go low when either the CR_LOCK gets inactive or both of the DRSSI or DQD signals go low.
Fast mode: The VDI signal follows the level of the DQD signal.
Always mode: VDI is connected to logic high permanently. It stays always high independently of the receiving parameters.
Bits 7-5 (i2 to i0):
Note: For the optimal bandwidth settings at different data rates see the table on page 37.
CR_LOCK
CR_LOCK
DRSSI
DRSSI
DQD
DQD
VDI (valid data indicator) signal response time setting:
Receiver baseband bandwidth (BW) select:
d1
0
0
1
1
i2
0
0
0
0
1
1
1
1
d0
SET
CLR
0
1
0
1
DQD
i1
0
0
1
1
0
0
1
1
R/S FF
i0
Q
0
1
0
1
0
1
0
1
Note:
* For details see the Power Management Command
Response
Always on
Medium
BW [kHz]
Slow
Reserved
Reserved
Fast
400
340
270
200
134
67
LOGIC HIGH
MEDIUM
SLOW
FAST
d0
d1
er *
SEL1
SEL0
IN0
IN1
IN2
IN3
MUX
CLR
Y
VDI
Si4421
18