ZFSM-101-1 CEL, ZFSM-101-1 Datasheet - Page 4

• Manufacturer Part Number: ZFSM-101-1
• Description: MODULE ZIGBEE 802.15.4
• Manufacturer: CEL
• Series: FreeStarr

Specifications of ZFSM-101-1

• Frequency: 2.4GHz
• Data Rate - Maximum: 250kbps
• Modulation Or Protocol: 802.15.4 Zigbee
• Applications: General Purpose
• Power - Output: 20dBm
• Sensitivity: -92dBm
• Voltage - Supply: 2.4 V ~ 3.6 V
• Data Interface: PCB, Surface Mount
• Antenna Connector: On-Board, Trace
• Operating Temperature: -40°C ~ 85°C
• Package / Case: Module
• Wireless Frequency: 2.4 GHz to 2.5 GHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Memory Size: -
• Current - Transmitting: -
• Current - Receiving: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• For Use With/related Products: MC13192, MC9S08GT60

PIN DEFINITIONS
Note
TPRF1
ANT2
PIN
10
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
11
1
2
3
4
5
6
7
8
9
1
Normally the reset pin is an output; however under brown out and other reset conditions the Freescale
microcontroller will drive the pin low.
Use an Open Collector Output to Drive the Reset pin or put a 1k Ohm resistor in series with the driving source.
DI/DO
DI/DO
DI/DO
DI/DO
DI/DO
DI/DO
DI/DO
DI/DO
DI/DO
DI/DO
AO/AI
AO/AI
TYPE
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
DO
AI
AI
PI
DI
DI
DI
DI
DI
/RESET
SIGNAL
MODE0
MODE1
MODE2
TPRF1
NAME
PTGO
ANT2
PTD3
PTD4
PTB0
PTB1
PTC0
PTC1
PTC5
PTA4
PTA5
PTA6
PTA7
GND
GND
GND
GND
VCC
GND
RXD
GND
GND
GND
GND
GND
GND
TXD
1
DIGITAL INPUT CONFIGURED TO INTERRUPT ON RISING EDGE OF SIGNAL TO WAKE
PORT G, BIT 0, BKGD/MS (BACKGROUND/MODE SELECT, FOR PROGRAMMING
GENERAL PURPOSE DIGITAL I/O FIRMWARE CONFIGURABLE, PORT D , BIT 3
GENERAL PURPOSE DIGITAL I/O FIRMWARE CONFIGURABLE, PORT D , BIT 4
UP MODULE FROM SLEEP MODE. PORT A, BIT 7, KBI1P7 (KEYBOARD INTERRUPT)
GENERAL PURPOSE DIGITAL I/O FIRMWARE CONFIGURABLE PORT C, BIT 0,
GENERAL PURPOSE DIGITAL I/O FIRMWARE CONFIGURABLE PORT C, BIT 1,
GENERAL PURPOSE DIGITAL I/O FIRMWARE CONFIGURABLE PORT A, BIT 4,
GENERAL PURPOSE DIGITAL I/O FIRMWARE CONFIGURABLE PORT A, BIT 5,
GENERAL PURPOSE DIGITAL I/O FIRMWARE CONFIGURABLE PORT A, BIT 6,
SCI2 TXD2 (SERIAL COMMUNICATION INTERFACE 2, TRANSMIT DATA)
SCI2 RXD2 (SERIAL COMMUNICATION INTERFACE 2, RECEIVE DATA)
ANALOG TO DIGITAL CONVERTER INPUT, PORT B , INPUT 1
ANALOG TO DIGITAL CONVERTER INPUT, PORT B , INPUT 0
FCC / PRODUCTION TEST MODE INPUT WORD, BIT 0
FCC / PRODUCTION TEST MODE INPUT WORD, BIT 1
FCC / PRODUCTION TEST MODE INPUT WORD, BIT 2
APPLICATION TRANSMIT DATA OUTPUT (SCI1, TXD1)
APPLICATION RECEIVE DATA INPUT (SCI1, RXD1)
PRIMARY POWER INPUT: VCC = 2.4 TO 3.6 VDC
COAXIAL RF TEST POINT – 50 OHMS
KBI1P4 (KEYBOARD INTERRUPT)
KBI1P5 (KEYBOARD INTERRUPT)
KBI1P6 (KEYBOARD INTERRUPT)
INTEGRATED PBC F-ANTENNA
MASTER RESET, ACTIVE LOW
ELECTRICAL DESCRIPTION
AND FIRMWARE DEBUG
RESERVED
GROUND
GROUND
GROUND
GROUND
GROUND
GROUND
GROUND
GROUND
GROUND
GROUND
GROUND