MICRF001YM Micrel Inc, MICRF001YM Datasheet - Page 7

• Manufacturer Part Number: MICRF001YM
• Description: IC RECEIVER/DATA MOD 14-SOIC
• Manufacturer: Micrel Inc

Specifications of MICRF001YM

• Frequency: 300MHz ~ 440MHz
• Sensitivity: -95dBm
• Data Rate - Maximum: 4.8 kbps
• Modulation Or Protocol: OOK
• Applications: Garage Door, RKE
• Current - Receiving: 6.3mA
• Data Interface: PCB, Surface Mount
• Antenna Connector: PCB, Surface Mount
• Features: Automatic Tuning
• Voltage - Supply: 4.75 V ~ 5.5 V
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 14-SOIC (0.154", 3.90mm Width)
• Receiving Current: 6.3mA
• Data Rate: 4.8Kbps
• Modulation Type: OOK
• Frequency Range: 300MHz To 440MHz
• Sensitivity Dbm: -95dBm
• Rf Ic Case Style: SOIC
• No. Of Pins: 14
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Memory Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

June 1998
MICRF001
3. CAGC Pin
Figure 3 illustrates the CAGC pin interface circuit. The AGC
control voltage is developed as an integrated current into a
capacitor CAGC.
while the decay current is a 1/10th scaling of this,
approximately 1.5 A. Signal gain of the RF/IF strip inside
the IC diminishes as the voltage on CAGC decreases. By
simply adding a capacitor to CAGC pin, the attack/decay
time constant ratio is fixed at 1:10. Further discussion on
setting the attack time constant is found in “Application Note
22,
Modification of the attack/decay ratio is possible by adding
resistance from CAGC pin either to VDDBB or VSSBB, as
desired.
4. DO Pin
The output stage for the Data Comparator (DO pin) is shown
in Figure 4. The output is a 10µA push-10µA pull, switched
current stage. Such an output stage is capable of driving
CMOS-type loads.
MICRF001
Figure 4 DO Pin
Theory
The attack current is nominally 15 A,
of
Figure 2 CTH Pin
Operation” ,
section
Figure 5 REFOSC Pin
QwikRadio
6.5.
7
5. REFOSC Pin
The REFOSC input circuit is shown in Figure 5.
impedance is quite high (200k ). This is a Colpitts oscillator,
with internal 30pF capacitors. This input is intended to work
with standard ceramic resonators, connected from this pin to
VSSBB.
capacitors, since these capacitors are contained inside the
IC.
amplitude limited to approximately 0.5Vpp. The nominal DC
bias voltage on this pin is 1.4V.
6. Control Inputs (SEL0, SEL1, SWEN)
Control input circuitry is shown in Figure 6. The standard
input is a logic inverter constructed with minimum geometry
MOSFETs (Q2, Q3).
channel length device which functions essentially as a
“weak” pullup to VDDBB.
leading to an impedance to the VDDBB supply of typically
1M .
tm
Externally applied signals should be AC-coupled,
The resonators should not contain integral
P-channel MOSFET Q1 is a large
Figure 3 CAGC Pin
Figure 6 SEL0, SEL1, SWEN
Typical pullup current is 5 A,
MICRF001
Micrel
Input