RXM-916-ES_ Linx Technologies Inc, RXM-916-ES_ Datasheet - Page 3

RECEIVER RF 916MHZ 16PIN SMD

RXM-916-ES_

Manufacturer Part Number
RXM-916-ES_
Description
RECEIVER RF 916MHZ 16PIN SMD
Manufacturer
Linx Technologies Inc
Series
-r
Datasheets

Specifications of RXM-916-ES_

Frequency
916MHz
Sensitivity
-102dBm
Data Rate - Maximum
56 kbps
Modulation Or Protocol
FM, FSK
Current - Receiving
6.5mA
Data Interface
PCB, Surface Mount
Antenna Connector
PCB, Surface Mount
Voltage - Supply
4.5 V ~ 5.5 V
Operating Temperature
0°C ~ 70°C
Package / Case
16-SMD
Board Size
20.6 mm x 16 mm x 3.2 mm
Minimum Operating Temperature
0 C
Supply Voltage (min)
4.5 V
Product
RF Modules
Maximum Frequency
916.48 MHz
Supply Voltage (max)
5.5 V
Maximum Operating Temperature
+ 70 C
Applications
-
Memory Size
-
Features
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
-
Applications
-
Memory Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
RXM-916-ES
RXM-916-ES
RXM916ES

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
RXM-916-ES_
Manufacturer:
LNX
Quantity:
49
PIN ASSIGNMENTS
Figure 7: ES Series Transmitter Pinout (Top View)
PIN DESCRIPTIONS
Page 4
Pin #
10
1
2
3
4
5
6
7
8
9
/CLK SEL
LO_V_D
Name
DATA
LADJ
GND
/CLK
GND
PDN
ANT
V
CC
Power Down. Pulling this line low will place the transmitter
power level of the transmitter. Connecting to Vcc will give
Low Voltage Detect. This line goes low when V
Level Adjust. This line can be used to adjust the output
Clock Frequency Selection. Logic low selects divide by
into a low-current state. The module will not be able to
the highest output, while placing a resistor to GND will
1
2
3
4
5
lower the output level (see Figure 4 on Page 3).
PDN
LADJ
VCC
GND
DATA
256, logic high selects divide by 1,024.
transmit a signal in this state.
Analog or Digital Data Input
LO_V_D
/CLK SE
Divided Clock Output
GND
/CLK
50-ohm RF Output
ANT
Description
Supply Voltage
Analog Ground
Analog Ground
than 2.15V.
10
9
8
7
6
CC
is less
MODULE DESCRIPTION
Figure 8: ES Series Transmitter Block Diagram
THEORY OF OPERATION
Data In
/CLK SEL
The TXM-***-ES module is a single-channel transmitter designed for the wireless
transfer of digital or analog information over distances of up to 1,000 feet
outdoors and up to 500 feet indoors. It is based on a high-performance
synthesized architecture. FM / FSK modulation is utilized to provide superior
performance and noise immunity over AM-based solutions. The ES Series is
incredibly compact and cost-effective when compared with other FM / FSK
devices. Best of all, it is packed with many useful features and capabilities that
offer a great deal of application flexibility to the designer. Some of these features,
which will be discussed in depth in this data guide, are:
/CLK Output (use for an external micro-controller)
LO_V_DET (low-voltage detection)
LADJ
The ES Series is offered in the 902-928MHz band, which is free from the legal
restrictions of the lower 260-470MHz band. This gives the designer much more
freedom in the types of applications that can be designed. The 869.85MHz
version allows for the same freedom of design in European applications.
The ES Series FM / FSK transmitter is capable of generating 1mW of output
power into a 50-ohm load while suppressing harmonics and spurious emissions
to within legal limits. The transmitter is comprised of a VCO and a crystal-
controlled frequency synthesizer. The frequency synthesizer, referenced to a
precision crystal, locks the VCO to achieve a high-Q, low phase-noise oscillator.
The transmitter operates by directly modulating the crystal with the baseband
signal present on the DATA line. Pulling the crystal in this manner achieves the
desired deviation and linearity. If the transmitter’s VCO were modulated, the
frequency synthesizer would track out much of the deviation within the
bandwidth of the loop filter (this is a common limitation of most synthesized FM
transmitters). The carrier is then amplified and filtered before being output on the
50-ohm ANT line.
The frequency of the Divided Clock output is determined by the state of the Clock
Frequeny Selection line. A low on the Select line will generate a signal on the
clock output that is the center frequency divided by 256, a high will be the center
frequency divided by 1,024.
Precision
Crystal
(adjust the RF output power)
Frequency Divider
PLL Frequency
Synthesizer
256 / 1,024
RF Amplifier
/CLK Output
Filter
LC
Antenna Port
Page 5

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