T5743P6-TGS Atmel, T5743P6-TGS Datasheet - Page 23
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T5743P6-TGS
Manufacturer Part Number
T5743P6-TGS
Description
IC RCVR300-450MHZ ASK/FSK 20SOIC
Manufacturer
Atmel
Datasheet
1.T5743P6-TGQ.pdf
(41 pages)
Specifications of T5743P6-TGS
Frequency
300MHz ~ 450MHz
Sensitivity
-108dBm
Data Rate - Maximum
10 kBaud
Modulation Or Protocol
ASK, FSK
Applications
General Purpose Data Transmission Systems
Current - Receiving
30mA
Data Interface
PCB, Surface Mount
Antenna Connector
PCB, Surface Mount
Voltage - Supply
4.5 V ~ 5.5 V
Operating Temperature
-40°C ~ 105°C
Package / Case
20-SOIC (0.300", 7.50mm Width)
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Features
-
Memory Size
-
Other names
T5743N-TGS
T5743N-TGS
T5743P6-TG
T5743P6-TG
T5743PG-TGS
T5743PG-TGS
T5743N-TGS
T5743P6-TG
T5743P6-TG
T5743PG-TGS
T5743PG-TGS
Figure 31. Controlled Noise Suppression
Configuration of the
Receiver
4569A–RKE–12/02
Serial bi-directional
data line
(DATA_CLK)
POLLING/_ON
Bit-check
mode
Bit check ok
Preburst
The T5743 receiver is configured via two 12-bit RAM registers called OPMODE and
LIMIT. The registers can be programmed by means of the bidirectional DATA port. If the
register contents have changed due to a voltage drop, this condition is indicated by a
certain output pattern called reset marker (RM). The receiver must be reprogrammed in
that case. After a power-on reset (POR), the registers are set to default mode. If the
receiver is operated in default mode, there is no need to program the registers. Table 4
shows the structure of the registers. According to Table 2 bit 1 defines if the receiver is
set back to polling mode via the OFF-command (see section “Receiving Mode”) or if it is
programmed. Bit 2 represents the register address. It selects the appropriate register to
be programmed. To get a high programming reliability, Bit15 (Stop bit), at the end of the
programming operation, must be set to 0.
Table 2. Effect of Bit 1 and Bit 2 on Programming the Registers
Table 3. Effect of Bit 15 on Programming the Register
Bit 1
Data
1
0
0
Receiving mode
Bit 15
0
1
Digital Noise
Bit 2
x
1
0
OFF-command
Action
The receiver is set back to polling mode (OFF command)
The OPMODE register is programmed
The LIMIT register is programmed
Action
The values will be written into the register (OPMODE or LIMIT)
The values will not be written into the register
Start-up
mode
Bit-check
mode
Bit check ok
Preburst
Receiving mode
Data
Digital Noise
Sleep
mode
T5743
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