T5761-TGQ Atmel, T5761-TGQ Datasheet - Page 8

• Manufacturer Part Number: T5761-TGQ
• Description: IC RX 915MHZ ISM ASK/FSK 20SOIC
• Manufacturer: Atmel

Specifications of T5761-TGQ

• Frequency: 915MHz
• Sensitivity: -110dBm
• Data Rate - Maximum: 10 kBaud
• Modulation Or Protocol: ASK, FSK
• Applications: General Purpose Data Transmission Systems
• Current - Receiving: 170µA
• Data Interface: PCB, Surface Mount
• Antenna Connector: PCB, Surface Mount
• Voltage - Supply: 4.5 V ~ 5.5 V
• Operating Temperature: -40°C ~ 105°C
• Package / Case: 20-SOIC (0.300", 7.50mm Width)
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Features: -
• Memory Size: -
• Other names: T5761-TGQTR

Polling Circuit and
Control Logic
Basic Clock Cycle of
the Digital Circuitry
8
T5760/T5761
Figure 7. Wide Band Receiving Frequency Response
The receiver is designed to consume less than 1 mA while being sensitive to signals
from a corresponding transmitter. This is achieved via the polling circuit. This circuit
enables the signal path periodically for a short time. During this time the bit-check logic
verifies the presence of a valid transmitter signal. Only if a valid signal is detected, the
receiver remains active and transfers the data to the connected microcontroller. If there
is no valid signal present, the receiver is in sleep mode most of the time resulting in low
current consumption. This condition is called polling mode. A connected microcontroller
is disabled during that time.
All relevant parameters of the polling logic can be configured by the connected micro-
controller. This flexibility enables the user to meet the specifications in terms of current
consumption, system response time, data rate etc.
Regarding the number of connection wires to the microcontroller, the receiver is very
flexible. It can be either operated by a single bi-directional line to save ports to the
connected microcontroller or it can be operated by up to five uni-directional ports.
The complete timing of the digital circuitry and the analog filtering is derived from one
clock. This clock cycle T
with a divide by 14 circuit. According to chapter ‘RF Front End’, the frequency of the
crystal oscillator (f
operating frequency of the local oscillator (f
giving T
T
•
•
•
•
•
Most applications are dominated by two transmission frequencies: f
mainly used in USA, f
T
each parameter.
Clk
Clk
-dependent parameters on this electrical characteristics display three conditions for
controls the following application-relevant parameters:
Timing of the polling circuit including bit check
Timing of the analog and digital signal processing
Timing of the register programming
Frequency of the reset marker
IF filter center frequency (f
Clk
= 2.066 µs for f
-100.0
-20.0
-30.0
-40.0
-60.0
-80.0
-90.0
-50.0
-70.0
-10.0
0.0
XTO
-12.0
) is defined by the RF input signal (f
Transmit
Clk
-9.0
RF
is derived from the crystal oscillator (XTO) in combination
= 868.3 MHz and T
= 868.3 MHz in Europe. In order to ease the usage of all
IF0
-6.0
)
-3.0
df (MHz)
0.0
LO
). The basic clock cycle is T
Clk
3.0
= 1.961 µs for f
6.0
RFin
9.0
) which also defines the
RF
12.0
Transmit
= 915 MHz.
4561B–RKE–10/02
= 915 MHz is
Clk
= 14/f
XTO