XE1205SKC433XE1 Semtech, XE1205SKC433XE1 Datasheet - Page 15

• Manufacturer Part Number: XE1205SKC433XE1
• Description: KIT STARTER FOR XE1205 433MHZ
• Manufacturer: Semtech
• Series: TrueRF™r
• Type: Transceiver, ISMr

Specifications of XE1205SKC433XE1

• Frequency: 433MHz
• For Use With/related Products: XE1205 (433MHz)
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

If IRQParam_Start_fill is high, FIFO filling is initiated by asserting IRQParam_Start_detect.
Once sixteen bytes have been written to the FIFO the IRQParam_Fifofull signal is asserted. Data should then normally
be read out. If no action is taken the FIFO will overflow and subsequent data will be lost. If this occurs the
IRQParam_Fifooverrun bit is set. The IRQParam_Fifofull signal can be mapped to pin IRQ_1 as an interrupt for a
microcontroller if IRQParam_RX_irq_1 is set to “01” (please refer to section 5.2.2).
To recover from an overflow situation a ‘1’ must be written to IRQParam_Fifooverrun; this clears the contents of the
FIFO, resets all FIFO status flags and re-initiates pattern matching (only when an overrun has occurred).
In order to clear the FIFO in reception, a “1” should be written in IRQParam_start_detect (bit 6 add 6).
Pattern matching can also be re-initiated during a FIFO filling sequence by writing a ‘1’ to IRQParam_Start_detect.
© Semtech 2008
.
Q_lim
I_lim
DEMODULATOR
FSK
/RXParam_Disable_bitsync
RXParam_RSSI
RSSI
SYNCHRONIZER
= ‘0’
BIT
Figure 8: Receiver chain in buffered mode
RSSI_irq
data
dclk
15
Shift reg
FIFO
8
RXParam_Pattern
MATCHING
PATTERN
8
= ‘1’
regspidata
DATA
SPI
Fifofull
write_byte
/fifoempty
pattern
XE1205
NSS_DATA
www.semtech.com
MOSI
MISO
SCK
IRQ_0
IRQ_1