ATA555811C-DDB Atmel, ATA555811C-DDB Datasheet - Page 35

• Manufacturer Part Number: ATA555811C-DDB
• Description: IC IDIC 1KBIT R/W DIE
• Manufacturer: Atmel

Specifications of ATA555811C-DDB

• Function: Read/Write
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

7.15
7.16
4681E–RFID–11/09
ArmClear
ClearAll
A selected tag, when receiving the ArmClear command with the Master Key NOT set to 6 will
prepare the device for a subsequent ClearAll command.
If this command is followed by any command other than a ClearAll, it will become disarmed. In
which case the ArmClear must be repeated before a ClearAll can be successfully executed.
Table 7-30.
Table 7-31.
Tags in the Selected state, if previously armed by the ArmClear command will clear all memory
blocks and their lock bits with the exception of the traceability data blocks (see
page 4
The ClearAll command includes an EEPROM programming sequence. The maximum EEPROM
programming time is 6 ms. On completion of a successful clear the tag replies with a single SOF
pattern.
If for any reason the clear operation fails, the tag will generate the corresponding error code. The
error code bits are dual pattern coded (see
and are preceded by a SOF pattern. If the constant downlink checksum CRC_d (if appended) is
incorrect, the clear operation is aborted and an error response is returned immediately.
Table 7-32.
Table 7-33.
Command
ArmClear = 00 11 00 10 00
10 bits
SOF
Start of Frame
3 .. 10-bit period
Command
ClearAll = 00 01
4 bits
SOF
Start of Frame
3 .. 10-bit period
in “Memory” section).
Interrogator Command
Tag Response
Interrogator Command Parameters
Tag Response
Parameter 1
01 11 11
6 bits
Parameter 2
00
2 bits
Figure 3-2 on page 11
Error Flags
Present on error only
4-bit – dual pattern code
Parameter
00 00 00
6 bits
Parameter 3
32
32 bits
0 bits
and
CRC (Optional)
CRC_u = 96ADh
16 bits
Table 7-2 on page
ATA5558
Figure 2-3 on
26)
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