AD8318ACPZ-R2 Analog Devices Inc, AD8318ACPZ-R2 Datasheet - Page 20

• Manufacturer Part Number: AD8318ACPZ-R2
• Description: IC RF DETECTOR/CTRLR 16-LFCSP
• Manufacturer: Analog Devices Inc

Specifications of AD8318ACPZ-R2

• Design Resources: Stable, Closed-Loop Automatic Power Control for RF Appls (CN0050) Software Calibrated, 1 MHz to 8 GHz, 70 dB RF Power Measurement System Using AD8318 (CN0150)
• Frequency: 1MHz ~ 8GHz
• Rf Type: RADAR, 802.11/Wi-Fi, 8.2.16/WiMax, Wireless LAN
• Input Range: -60dBm ~ -2dBm
• Accuracy: ±1dB
• Voltage - Supply: 4.5 V ~ 5.5 V
• Current - Supply: 68mA
• Package / Case: 16-VQFN, CSP Exposed Pad
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: AD8318ACPZ-R2; AD8318ACPZ-R2TR

AD8318
For the AGC loop to remain locked, the AD8318 must track the
envelope of the VGA output signal and provide the necessary
voltage levels to the AD8367 gain control input. Figure 45
shows an oscilloscope screen image of the AGC loop depicted
in Figure 43. A 50 MHz sine wave with 50% AM modulation is
applied to the AD8367. The output signal from the VGA is a
constant envelope sine wave with an amplitude corresponding
to a setpoint voltage at the AD8318 of 1.0 V.
The 45 dB control range is constant for the range of V
voltages. The input power levels to the AD8367 must be optimized
to achieve this range. In Figure 46, the minimum and maximum
input power levels are shown vs. setpoint voltage.
–10
–15
–20
–25
–30
–35
–40
–45
–50
–55
–60
Figure 45. Oscilloscope Screen Image Showing an AM Modulated
of this input signal and applies the appropriate voltage to ensure
–5
0
Figure 44. AD8367 Output Power vs. AD8318 Setpoint Voltage
1
2
3
0.6
Input Signal to the AD8367. The AD8318 tracks the envelope
CH1 50.0mV
CH3 20.0mV
AM MODULATED INPUT
AD8318 V
AD8367 OUTPUT
0.8
a constant output from the AD8367.
OUT
1.0
CH2 200mV
1.2
V
SET
(V)
M4.00ms
1.4
1.6
A CH2
1.8
64.0mV
SET
2.0
1.2
1.0
0.8
0.6
0.4
0.2
0
–0.2
–0.4
–0.6
–0.8
–1.0
–1.2
Rev. B | Page 20 of 24
In some cases, if V
time for the AGC loop to recover; that is, the output of the
AD8318 remains at an abnormally high value and the gain is set
to its maximum level. A voltage divider is placed between the
output of the AD8318 and the AD8367 GAIN pin to ensure that
V
In Figure 43, C
and distortion due to harmonics at higher gain settings. Some
additional filtering is recommended between the output of the
AD8367 and the input of the AD8318. This helps to decrease
the output noise of the AD8367, which can reduce the dynamic
range of the loop at higher gain settings (smaller V
Response time and the amount of signal integration are controlled
by C
around an integrating amplifier. Though it is possible to use
large capacitors for C
provide sufficient filtering.
Calibration in controller mode is similar to the method used in
measurement mode. Do a simple 2-point calibration by applying
two known V
output power from the VGA. Slope and intercept are calculated
using Equation 20 to Equation 22:
For more information on AGC applications, refer to the
AD8367
GAIN
FLT
Slope = (V
Intercept = P
V
does not exceed 1.0 V.
SET
. This functionality is analogous to the feedback capacitor
–10
–20
–30
–40
–50
–60
–70
–80
10
0
0.5
data sheet or
= Slope × (Px − Intercept)
Figure 46. Setpoint Voltage vs. Input Power. Optimal
signal levels must be used to achieve the full 45 dB
SET
0.6
dynamic range capabilities of the AD8367.
HP
SET1
voltages or DAC codes and measuring the
and R
OUT1
0.7
GAIN
− V
FLT
− V
ADL5330
SET2
is >1.0 V it can take an unusually long
0.8
HP
, in most applications, values under 1 nF
)/(P
SET1
are configured to reduce oscillation
MINIMUM INPUT LEVEL
0.9
/Slope
OUT1
V
MAXIMUM INPUT LEVEL
SET
data sheet.
1.0
− P
(V)
OUT2
1.1
)
1.2
1.3
SET
1.4
).
1.5
(20)
(21)
(22)