AD8362ARUZ Analog Devices Inc, AD8362ARUZ Datasheet

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AD8362ARUZ

Manufacturer Part Number
AD8362ARUZ
Description
IC PWR DETECTOR 3.8GHZ 16-TSSOP
Manufacturer
Analog Devices Inc
Datasheet

Specifications of AD8362ARUZ

Rf Type
Cellular, GSM, CDMA, TDMA, TETRA
Frequency
50Hz ~ 3.8GHz
Input Range
-52dBm ~ 8dBm
Accuracy
0.5dB
Voltage - Supply
4.5 V ~ 5.5 V
Current - Supply
20mA
Package / Case
16-TSSOP (0.173", 4.40mm Width)
Frequency Range
50Hz To 3.8GHz
Supply Current
20mA
Supply Voltage Range
4.5V To 5.5V
Rf Ic Case Style
TSSOP
No. Of Pins
16
Operating Temperature Range
-40°C To +85°C
Pin Count
16
Screening Level
Industrial
Package Type
TSSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant

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FEATURES
Complete fully calibrated measurement/control system
Accurate rms-to-dc conversion from 50 Hz to 3.8 GHz
Input dynamic range of >65 dB: −52 dBm to +8 dBm in 50 Ω
Waveform and modulation independent, such as
Linear-in-decibels output, scaled 50 mV/dB
Law conformance error of 0.5 dB
All functions temperature and supply stable
Operates from 4.5 V to 5.5 V at 24 mA
Power-down capability to 1.3 mW
APPLICATIONS
Power amplifier linearization/control loops
Transmitter power controls
Transmitter signal strength indication (TSSI)
RF instrumentation
GENERAL DESCRIPTION
The AD8362 is a true rms-responding power detector that has
a 65 dB measurement range. It is intended for use in a variety of
high frequency communication systems and in instrumentation
requiring an accurate response to signal power. It is easy to use,
requiring only a single supply of 5 V and a few capacitors. It can
operate from arbitrarily low frequencies to over 3.8 GHz and
can accept inputs that have rms values from 1 mV to at least
1 V rms, with large crest factors, exceeding the requirements
for accurate measurement of CDMA signals.
The input signal is applied to a resistive ladder attenuator that
comprises the input stage of a variable gain amplifier (VGA).
The 12 tap points are smoothly interpolated using a proprietary
technique to provide a continuously variable attenuator, which
is controlled by a voltage applied to the VSET pin. The resulting
signal is applied to a high performance broadband amplifier. Its
output is measured by an accurate square-law detector cell. The
fluctuating output is then filtered and compared with the output
of an identical squarer, whose input is a fixed dc voltage applied
to the VTGT pin, usually the accurate reference of 1.25 V pro-
vided at the VREF pin.
The difference in the outputs of these squaring cells is integrated
in a high gain error amplifier, generating a voltage at the VOUT
pin with rail-to-rail capabilities. In a controller mode, this low
noise output can be used to vary the gain of a host system’s RF
Rev. D
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
GSM/CDMA/TDMA
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
Fax: 781.461.3113
amplifier, thus balancing the setpoint against the input power.
Optionally, the voltage at VSET can be a replica of the RF signal’s
amplitude modulation, in which case the overall effect is to
remove the modulation component prior to detection and low-
pass filtering. The corner frequency of the averaging filter can
be lowered without limit by adding an external capacitor at the
CLPF pin. The AD8362 can be used to determine the true power
of a high frequency signal having a complex low frequency
modulation envelope, or simply as a low frequency rms volt-
meter. The high-pass corner generated by its offset-nulling
loop can be lowered by a capacitor added on the CHPF pin.
Used as a power measurement device, VOUT is strapped to
VSET. The output is then proportional to the logarithm of the
rms value of the input. In other words, the reading is presented
directly in decibels and is conveniently scaled 1 V per decade,
or 50 mV/dB; other slopes are easily arranged. In controller
modes, the voltage applied to VSET determines the power level
required at the input to null the deviation from the setpoint.
The output buffer can provide high load currents.
The AD8362 has 1.3 mW power consumption when powered
down by a logic high applied to the PWDN pin. It powers up
within about 20 μs to its nominal operating current of 20 mA at
25°C. The AD8362 is supplied in a 16-lead TSSOP for operation
over the temperature range of −40°C to +85°C.
VTGT
VREF
INLO
INHI
65 dB TruPwr
FUNCTIONAL BLOCK DIAGRAM
DECL
COMM
©2003–2007 Analog Devices, Inc. All rights reserved.
AD8362
CHPF
Figure 1.
50 Hz to 3.8 GHz
x
x
2
2
PWDN
BIAS
Detector
AD8362
www.analog.com
CLPF
VOUT
ACOM
VSET
VPOS

Related parts for AD8362ARUZ

AD8362ARUZ Summary of contents

Page 1

FEATURES Complete fully calibrated measurement/control system Accurate rms-to-dc conversion from 3.8 GHz Input dynamic range of >65 dB: −52 dBm to +8 dBm in 50 Ω Waveform and modulation independent, such as GSM/CDMA/TDMA Linear-in-decibels output, scaled 50 ...

Page 2

AD8362 TABLE OF CONTENTS Features .............................................................................................. 1 Applications....................................................................................... 1 Functional Block Diagram .............................................................. 1 General Description ......................................................................... 1 Revision History ............................................................................... 2 Specifications..................................................................................... 3 Absolute Maximum Ratings............................................................ 6 ESD Caution.................................................................................. 6 Pin Configuration and Function Descriptions............................. 7 Equivalent Circuits ........................................................................... ...

Page 3

SPECIFICATIONS 25° Ω, differential input drive via balun S O Table 1. Parameter Conditions OVERALL FUNCTION Maximum Input Frequency Input Power Range (Differential) dB referred to 50 Ω impedance level, f ...

Page 4

AD8362 Parameter Conditions RMS TARGET INTERFACE Pin VTGT Nominal Input Voltage Range Measurement range = 60 dB, to ±1 dB error Input Bias Current VTGT = 1.25 V VTGT = 0 V Incremental Input Resistance POWER-DOWN INTERFACE Pin PWDN Logic ...

Page 5

Parameter Conditions 2.7 GHz Dynamic Range Error referred to best-fit line (linear regression) ±1.0 dB linearity, CW input ±0.5 dB linearity, CW input Deviation vs. Temperature Deviation from output at 25°C −40°C < T −40°C < T −40°C < T ...

Page 6

AD8362 ABSOLUTE MAXIMUM RATINGS Table 2. Parameter Supply Voltage VPOS Input Power (Into Input of Device) Equivalent Voltage Internal Power Dissipation θ JA Maximum Junction Temperature Operating Temperature Range Storage Temperature Range Lead Temperature (Soldering, 60 sec) Stresses above those ...

Page 7

PIN CONFIGURATION AND FUNCTION DESCRIPTIONS Table 3. Pin Function Descriptions Pin No. Mnemonic Description 1, 8 COMM Common Connection. Connect via low impedance to system common. 2 CHPF Input HPF. Connect to common via a capacitor to determine 3 dB ...

Page 8

AD8362 EQUIVALENT CIRCUITS VPOS DECL COMM INHI 100Ω VGA 100Ω INLO VPOS COMM DECL Figure 3. Circuit A VPOS ~35kΩ VSET VSET ~35kΩ INTERFACE ACOM COMM Figure 4. Circuit B VPOS 50kΩ VTGT VTGT 50kΩ INTERFACE GAIN = 0.12 ACOM ...

Page 9

TYPICAL PERFORMANCE CHARACTERISTICS 4.5 4.0 3.5 3.0 2.5 2.0 2700MHz 1.5 1.0 900MHz 0.5 1900MHz 0 –60 –55 –50 –45 –40 –35 –30 –25 –20 –15 INPUT AMPLITUDE (dBm) Figure 8. Output Voltage (VOUT) vs. Input Amplitude (dBm), Frequencies: 100 ...

Page 10

AD8362 3.0 2.5 2.0 1.5 1.0 IS95 REVERSE LINK 0 –0.5 –1.0 W-CDMA 15-CHANNEL –1.5 –2.0 –2.5 –3.0 –60 –55 –50 –45 –40 –35 –30 –25 –20 –15 INPUT AMPLITUDE (dBm) Figure 14. Output Error from CW Linear ...

Page 11

INPUT AMPLITUDE (dBm) Figure 20. Logarithmic Law Conformance vs. Input Amplitude, 3 Sigma to ...

Page 12

AD8362 52.0 51.5 51.0 50.5 50.0 49.5 49.0 FREQUENCY (MHz) Figure 26. Logarithmic Slope vs. Frequency, Temperatures: −40°C, +25°C, and +85°C –53 –54 –55 –56 –57 –58 –59 –60 –61 –62 –63 FREQUENCY (MHz) Figure 27. Logarithmic Intercept vs. Frequency, ...

Page 13

TIME (µs) Figure 32. Output Response to RF Burst Input for Various RF Input Levels, Carrier Frequency 900 ...

Page 14

AD8362 5 0 –5 –10 –15 –20 –25 –30 –40 –30 –20 – TEMPERATURE (°C) Figure 38. Change in VREF vs. Temperature, 3 Sigma to Either Side of Mean 300 250 200 150 100 50 ...

Page 15

CHARACTERIZATION SETUP EQUIPMENT The general hardware configuration used for most of the AD8362 characterization is shown in Figure 40. The signal source is a Rohde & Schwarz SMIQ03B. A 1:4 balun transformer is used to transform the single-ended RF signal ...

Page 16

AD8362 CIRCUIT DESCRIPTION The AD8362 is a fully calibrated, high accuracy, rms-to-dc converter providing a measurement range of over 65 dB capable of operating from signals as low in frequency as a few hertz to at least 3.8 ...

Page 17

Because the scaling parameters of the two squarers are accurately matched, it follows that Equation 4 is satisfied only when 2 2 MEAN SIG ATG In a formal solution, extract the square root of ...

Page 18

AD8362 An approximate schematic of the signal input section of the AD8362 is shown in Figure 46. The ladder attenuator is com- posed of 11 sections (12 taps), each of which progressively attenuates the input signal by 6.33 dB. Each ...

Page 19

OPERATION IN RF MEASUREMENT MODE BASIC CONNECTIONS Basic connections for operating the AD8362 in measurement mode are shown in Figure 47. While the AD8362 requires a single supply of nominally 5 V, its performance is essentially unaffected by variations of ...

Page 20

AD8362 An external 100 Ω shunt resistor combines with the internal 100 Ω single-ended input impedance to provide a broadband 50 Ω match. The unused input (in this case, INLO) is ac-coupled to ground. Figure 49 shows the transfer function ...

Page 21

CHOOSING A VALUE FOR CHPF The 3.5 GHz VGA of the AD8362 includes an offset cancel- lation loop, which introduces a high-pass filter effect in its transfer function. To properly measure the amplitude of the input signal, the corner frequency ...

Page 22

AD8362 ADJUSTING VTGT TO ACCOMMODATE SIGNALS WITH VERY HIGH CREST FACTORS An external direct connection between VREF (1.25 V) and VTGT sets up the internal target voltage, which is the rms voltage that must be provided by the VGA to ...

Page 23

Moderately low resistance values should be used to minimize scaling errors due to the 70 kΩ input resistance at the VSET pin. This resistor string also loads the output, and it eventually reduces the load-driving capabilities if very low values ...

Page 24

AD8362 TEMPERATURE COMPENSATION AT VARIOUS WiMAX FREQUENCIES UP TO 3.8 GHz The AD8362 is ideally suited for measuring WiMAX type signals because crest factor changes in the modulation scheme have very little affect on the accuracy of the measurement. However, ...

Page 25

INPUT AMPLITUDE (dBm) Figure 59. AD8362 VOUT and Error with Linear Temperature Compensation at 2350 MHz 4.0 3.5 3.0 2.5 2.0 1.5 1.0 0.5 ...

Page 26

AD8362 OPERATION IN CONTROLLER MODE The AD8362 provides a controller mode feature at the VOUT pin. Using VSET for the setpoint voltage possible for the AD8362 to control subsystems such as power amplifiers (PAs), VGAs, or variable voltage ...

Page 27

RMS VOLTMETER WITH 90 dB DYNAMIC RANGE The 65 dB range of the AD8362 can be extended by adding a standalone VGA as a preamplifier whose gain control input is derived directly from VOUT. This extends the dynamic range by ...

Page 28

AD8362 AD8362 EVALUATION BOARD The AD8362 evaluation board provides for a number of dif- ferent operating modes and configurations, including many described in this data sheet. The measurement mode is set up by positioning SW2 as shown in Figure 67. ...

Page 29

Figure 68. Component Side Metal of Evaluation Board Figure 69. Component Side Silkscreen of Evaluation Board Rev Page AD8362 ...

Page 30

AD8362 Table 6. Bill of Materials Designator Description T1 C1 Supply filtering/decoupling capacitor C2 Supply filtering/decoupling capacitor C3, C9 Output low-pass filter capacitor C4, C7, C10 Input bias-point decoupling capacitors C5, C6 Input signal coupling capacitors C8 Input high-pass filter ...

Page 31

... OUTLINE DIMENSIONS ORDERING GUIDE Model Temperature Range AD8362ARU −40°C to +85°C AD8362ARU-REEL −40°C to +85°C AD8362ARU-REEL7 −40°C to +85°C 1 AD8362ARUZ −40°C to +85°C 1 AD8362ARUZ-REEL7 −40°C to +85°C 1 AD8362-EVALZ RoHS Compliant Part. 5.10 5.00 4. 4.50 6.40 4.40 BSC 4 ...

Page 32

AD8362 NOTES ©2003–2007 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D02923-0-6/07(D) Rev Page ...

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