AMMP-6220-BLK Avago Technologies US Inc., AMMP-6220-BLK Datasheet - Page 8

• Manufacturer Part Number: AMMP-6220-BLK
• Description: IC AMP LN 5X5MM SMD
• Manufacturer: Avago Technologies US Inc.

Specifications of AMMP-6220-BLK

• Rf Type: DBS, LMDS, VSAT
• Gain: 22dB
• Current - Supply: 55mA
• Frequency: 6GHz ~ 20GHz
• Noise Figure: 2.5dB
• P1db: 10dBm
• Package / Case: 8-QFN
• Voltage - Supply: 3 V ~ 5 V
• Frequency Rf: 20GHz
• Noise Figure Typ: 2.5dB
• Supply Current: 55mA
• Termination Type: SMD
• Power @ 1db Gain Compression, P1db: 10dB
• No. Of Pins: 8
• Filter Terminals: SMD
• Rohs Compliant: Yes
• Frequency Range: 6GHz To 20GHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Test Frequency: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant
• Other names: 516-1854; AMMP-6220-BLK; Q2035835

Recommended SMT Attachment
The AMMP Packaged Devices are compatible with high
volume surface mount PCB assembly processes.
The PCB material and mounting pattern, as defined in the
data sheet, optimizes RF performance and is strongly rec-
ommended. An electronic drawing of the land pattern
is available upon request from Avago Sales & Application
Engineering.
Stencil Design Guidelines
A properly designed solder screen or stencil is required
to ensure optimum amount of solder paste is deposited
Figure 23.
Figure 24.
8
Stencil Outline Drawing (mm)
Suggested PCB Land Pattern and Stencil Layout
onto the PCB pads. The recommended stencil layout is
shown in Figure 24. The stencil has a solder paste deposi-
tion opening approximately 70% to 90% of the PCB pad.
Reducing stencil opening can potentially generate more
voids underneath. On the other hand, stencil openings
larger than 100% will lead to excessive solder paste
smear or bridging across the I/O pads. Considering the
fact that solder paste thickness will directly affect the
quality of the solder joint, a good choice is to use a laser
cut stencil composed of 0.127 mm (5 mils) thick stainless
steel which is capable of producing the required fine
stencil outline. The combined PCB and stencil layout is
shown in Figure 25.
Figure 25.
Combined PCB and Stencil Layouts