SZA-6044Z Sirenza Microdevices Inc, SZA-6044Z Datasheet - Page 5

• Manufacturer Part Number: SZA-6044Z
• Description: IC AMP HBT GAAS 1/4W 16-QFN
• Manufacturer: Sirenza Microdevices Inc

Specifications of SZA-6044Z

• Current - Supply: 145mA ~ 185mA
• Frequency: 5.1GHz ~ 5.9GHz
• Gain: 14.9dB ~ 17.9dB
• Noise Figure: 7.8dB ~ 9.8dB
• P1db: 22.5dBm ~ 26dBm
• Package / Case: 16-QFN
• Rf Type: 802.11a/Wi-Fi, 802.16/WiMax, ISM, WLAN
• Test Frequency: 5.9GHz
• Voltage - Supply: 3 V ~ 5 V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 599-1073-2

DS091207
15, 16
13, 14
9, 10,
EPAD
1, 2,
5, 6,
7, 8,
Pin
11,
3,4
12,
19
20
18
17
RFOUT/ VC2
Function
VBIAS
VPC2
VPC1
RFIN
N/C
VC1
Gnd
Description
Pins are not used. May be grounded, left open or connected to adjacent pin.
VPC2 is the bias control pin for the stage 2 active bias circuit. An external series resistor is required for proper setting of
bias levels. Refer to the evaluation board schematic for resistor value.
VPC1 is the control pin for the stage 1 active bias circuits. An external series resistor is required for proper set-ting of
bias levels. Refer to the evaluation board schematic for resistor value.
VBIAS is the active bias circuit supply voltage. Can be operated from 3Vto5V.
RF input pin. This is DC grounded internal to the IC. Do not apply voltage to this pin. Both pins 3 and 4 must be used for
proper operation.
RF output and second stage collector supply voltage pin. VC2 in the range of 3Vto5V voltage should be sup-plied to this
pin through an external RF choke. Because DC biasing is present on this pin, a DC blocking capacitor should be used in
most applications (see evaluation board schematic). The supply side of the bias network should be well bypassed. The
output network and board layout specified in the app circuit is recommended for optimum performance. All pins 12-14
are required to be wired together at lead foot for proper operation.
VC1 is the first stage collector supply voltage. Can be operated over the range of 3Vto5V.
Exposed area on the bottom side of the package needs to be soldered to the ground plane of the board for optimum
thermal and RF performance. Several vias should be located under the EPAD as shown in the rec-ommended land pat-
tern.
7628 Thorndike Road, Greensboro, NC 27409-9421 · For sales or technical
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SZA-6044
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