4320-DKDB1 Silicon Laboratories Inc, 4320-DKDB1 Datasheet - Page 19
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4320-DKDB1
Manufacturer Part Number
4320-DKDB1
Description
KIT DEV TEST EZRADIO SI4320 RX
Manufacturer
Silicon Laboratories Inc
Specifications of 4320-DKDB1
Accessory Type
Test Card, Receiver, 868MHz, 915MHz
Wireless Frequency
915 MHz
Interface Type
SPI
Modulation
FSK, OOK
For Use With/related Products
EZRadio®
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
FIFO Buffered Data Read
In this operating mode, incoming data are clocked into a 16 bit FIFO buffer. The receiver starts to fill up the FIFO when the Valid Data
Indicator (VDI) bit and/or the synchron word recognition circuit indicates potentially real incoming data. This prevents the FIFO from being
filled with noise and overloading the external microcontroller.
For further details see the Receiver Setting Command and the Output and FIFO Command.
Polling Mode:
The nFFS signal selects the buffer directly and its content could be clocked out through pin SDO by SCK. Set the FIFO IT level to 1. In this
case, as long as FFIT indicates received bits in the FIFO, the controller may continue to take the bits away. When FFIT goes low, no more bits
need to be taken. An SPI read command is also available.
Interrupt Controlled Mode:
The user can define the FIFO level (the number of received bits) which will generate the nFFIT when exceeded. The status bits report the
changed FIFO status in this case.
During FIFO access the f
nFFS*
SDO
FFIT
SCK
nSEL
nSDI
FIFO OUT
0
SCK
FO+1
1
FIFO read out
cannot be higher than f
FO+2
2
FO+3
3
NOTE:
*nFFS is used to select FIFO
FO+4
4
ref
/4, where f
ref
is the crystal oscillator frequency.
Si4320
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