MC33493MOD315 Freescale Semiconductor, MC33493MOD315 Datasheet - Page 4

• Manufacturer Part Number: MC33493MOD315
• Description: BOARD EVALUATION FOR MC33493 TX
• Manufacturer: Freescale Semiconductor
• Type: Transmitterr

Specifications of MC33493MOD315

• Contents: Module and Misc Hardware
• For Use With/related Products: MC33493 315 MHz RF Module
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

Transmitter Functional Description
1
MC33493 is a PLL-tuned low-power UHF transmitter. The different modes of operation are controlled by the microcontroller
through several digital input pins. The power supply voltage ranges from 1.9 V to 3.6 V, allowing operation with a single lithium
cell.
2
The VCO is a completely integrated relaxation oscillator. The phase frequency detector (PFD) and the loop filter are fully
integrated. The exact output frequency is equal to: f
selected through the BAND pin.
Table 3
An out-of-lock function is performed by monitoring the PFD output voltage. When it exceeds defined limits, the RF output stage
is disabled.
3
The radio frequentcy (RF) output stage source is a single-ended square-wave switched current. Harmonics are present in the
output current drive. Their radiated absolute level depends on the antenna characteristics and output power. Typical application
demonstrates compliance to ETSI standard.
A resistor, R
consumption.
The output voltage is internally clamped to V
4
To select the On Off Keying (OOK) modulation, a low-logic level must be applied on the MODE pin. This modulation is
performed by switching the RF output stage on or off. The logic level applied on the DATA pin controls the output stage state:
Applying a high-logic level on the MODE pin selects Frequency Shift Keying (FSK) modulation. This modulation is achieved
by crystal pulling. An internal switch connected to the CFSK pin enables switching the external crystal load capacitors.
shows the possible configurations: serial and parallel.
The logic level applied on pin DATA controls the state of this internal switch:
DATA input is internally re-synchronized by the crystal reference signal. The corresponding jitter on the data duty cycle cannot
exceed ±1 reference period (±75 ns for a 13.56 MHz crystal).
This crystal pulling solution implies that the RF output frequency deviation equals the crystal frequency deviation multiplied
by the PLL Divider ratio (see
4
shows details for each frequency band selection.
DATA = 0
DATA = 1
DATA=0
DATA=1
Transmitter Functional Description
Phase Locked Loop and Local Oscillator
Radio Frequency (RF) Output Stage
Modulation
ext
, connected to the REXT pin controls the output power allowing a trade-off between radiated power and current
BAND Input Level
→
→
→
→
switch off,
switch on.
output stage on.
output stage off,
High
Low
PLL Tuned UHF Transmitter for Data Transfer Applications, Rev. 1.7
Table
Table 3. Band Selection and Associated Divider Ratios
3).
Frequency Band
cc
(MHz)
315
434
868
± 2 V
RFOUT
be
(typ. V
= f
PLL Divider Ratio
XTAL
cc
× [PLL divider ratio]. The frequency band of operation is
± 1.5 V @ T
32
64
A
=25 °C).
Crystal Oscillator
Frequency (MHz)
13.56
9.84
Freescale Semiconductor
Figure 2